ASIC RTL Engineer

3 weeks ago

Bengaluru Karnataka India, Karnataka Wipro Full time

Senior ASIC/SoC RTL Engineer/Lead (IP RTL design targeted for SOC, Static checks, some basic protocols)Exp - 4 - 20Location :Bengaluru, Hyderabad, Pune, Noida, KochiExpertise in SoC subsystem/IP designExpertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System VerilogIn depth knowledge on RTL quality checks (Lint, CDC)Knowledge of synthesis and low power is a plusGood understanding of AMBA bus protocols (AXI, AHB, ATB, APB)Good understanding of timing conceptsKnowledge of one or more of the interface protocols - PCIe -DDR -Ethernet - I2C, UART, SPIExpertise in setting up and using tools like -Spyglass Lint/CDC -Synopsys DC -Verdi/XcelliumUnderstanding of scripting languages like Make flow, Perl ,shell, python etcUnderstanding of processor architecture and/or ARM debug architecture is a plusAble to help and debug issues for multiple subsystemsAble to create/review design documents for multiple subsystemsAble to support physical design, verification, DFT and SW teams on design queries and reviewsAbout Us:Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With nearly 245,000 employees and business partners across 65 countries, we deliver on the promise of helping our clients, colleagues, and communities thrive in an ever-changing world. Wipro is an Equal Employment Opportunity employer and makes all employment and employment-related decisions without regard to a person's race, sex, national origin, ancestry, disability, sexual orientation, or any other status protected by applicable law.

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