Physical Design Engineer

Hi All,Eximietas Hiring Senior Physical Design Leads/Managers.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.About the jobQualification Required:Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R toolsBachelors OR Masters...

Hi All,Eximietas Hiring Senior Physical Design ArchitectsExperience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.About the jobQualification Required:Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R toolsBachelors OR Masters Degree...

Eximietas is Hiring – Senior Physical Design Leads / Managers Experience: 10+ Years Locations:Bengaluru, IndiaVisakhapatnam, IndiaSan Jose (Bay Area), USAAustin, USAEligibility (US Roles): Valid H1B or candidates already in the U.S.About the Role:We are looking for highly experienced Senior Physical Design Leads/Managers to collaborate with top-tier...

Physical Design EngineerJob SummaryThe Physical Design Engineer will be responsible for the full-chip and/or block-level physical implementation of complex digital, mixed-signal, or RF integrated circuits from RTL to GDSII (the final manufacturing data). This role requires expertise in design methodologies to achieve optimal performance, power, and area...

Job SummaryWe are seeking a highly experienced Senior Physical Design Engineer with a minimum of 10 years in the RTL to GDSII flow. This role requires hands-on expertise with Cadence Innovus, experience at N3 and below process nodes, and strong scripting and flow debugging skills. Key ResponsibilitiesLead physical design activities from RTL to GDSII,...

Full Chip Physical Design EngineerJob Summary:We are seeking a highly motivated and skilled engineer to join our SoC implementation team. You will be responsible for the physical design of complex ASICs and SoCs, working on full-chip floorplanning, integration, and signoff activities to meet aggressive PPA (Power, Performance, Area) goals.Key...

Position: Physical Design Engineer Location: Bangalore | Ahmedabad | Noida | Pune | Hyderabad Experience: 4–12 YearsRole Overview:Block-level Physical Design from RTL/Netlist to GDSIIPhysical, Timing & Power Signoff at block levelECO generation and closureScripting & automation using Perl, Tcl, Awk, PythonLead Role: Manage a team of 4–6 engineers and...

Physical Design Engineer - Senior / LeadJob Description:Strong background in digital IC design, including floorplanning, placement, routing, clock tree synthesis, and optimization.Tools Expertise: Proficient in Innovus, ICC2, and Fusion Compiler for place and route, timing closure, and physical design sign-off.Physical Design: Experience in floorplanning,...

Greetings From TCS !!!Role: Physical Design Location: BangaloreExperience Range: 5+ YearsMust-Have:Should have in depth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVSShould have worked on the latest technology nodes (14nm or 2nm to 5nm)Must have experience in Static timing analysisMust have experience in...

L&T Technologies (LTTS) is looking for Physical Design Engineers (PnR)with 4.5+ Years of experience.Job Location : Bangalore Please find the detailed job description below :: • IP/Block level PnR activities from Netlist to GDS-II. • Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like...