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Staff engineer, Digital Physical Design
2 weeks ago
ADI is looking for Senior PD Engineer for the development of complex mixed Signal SoCs. These chips are manufactured in most leading-edge process nodes and high speed clock rates.
These SoCs involve multiple processor cores and speed signal processing hardware running at high speed..
Position Requirements
BTech/MTech degree in Electrical/Electronics from a reputed institute with 8-12 years of experience in the field of Digital place and route
-Hands on experience with the implementation (PnR Signoff) of complex high speed SoC designs in cutting edge process technologies (16nm, 7nm etc).
Hands on experience in handling the tapeout of complex high speed SoC designs in cutting edge process technologies
Floor Planning, Power Plan, Place and Route, Clock Planning and Clock Tree Synthesis, Parasitic Extraction
Strong expertise in Static Timing analysis , constraint development and sign off.
-Innovate on the flows to meet the QoR targets and ensure predictability
Good understanding on device/interconnect and circuit aspect of the complex UDSM technologies is an added advantage.
Being proficient in TCL, Python etc.
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days-
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