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Vayavya Lab
1 week ago
Job Profile :
Verification Engineer
Experience- 3 To 6 Yrs
Location - Bengaluru
Job Description:
Understanding customer requirements on system level verification scenarios
Development of test scenarios in PSS language and in C or System Verilog/UVM (as needed)
Execution of test scenarios in pre-silicon (simulation, emulation) and post-silicon environments
Job Brief:
Portable Stimulus (PSS) is a new industry standard that enables specification of test intent in a verification environment agnostic way.
A test intent written in PSS can be used to generate verification scenarios for simulation, emulation, FPGA and post-Silicon environments.
PSS enables a significant productivity leap in chip/SoC Verification.Undoubtedly, PSS is the next big thing after System Verilog/UVM - it carries forward tried and tested techniques from System Verilog (like Constraint Driven Verification and Coverage) to system level for pre/post-silicon verification.
Vayavya Labs has been one of the original contributors to this industry standard and actively driving the discussion for the last many years.
Many companies are adopting PSS to meet the challenges of verifying today's complex systems.Vayavya Labs is helping with this transition - with years of expertise in Software driven Verification and the PSS standard itself.
See for more information on the standard and what we as Vayavya Labs are contributing.You will be part of the team working on Portable Stimulus technologies (PSS) and developing PSS based scenarios for different SoC sub-systems - PCIe, UCIe, CXL, GPU, MIPI CSI/DSI, Ethernet to name a few.
Other than functional verification, you will also be working on system level power verification, cache coherency etc. Training on PSS will be provided as part of the ramp-up phase.This is a great learning opportunity for someone already familiar
with System Verilog/UVM based verification. You get a chance to work at the leading-edge of SoC verification technologies.
Roles & Responsibilities:
Contributing to project planning, effort estimation and actively participating in timely deliverables and risk management keeping customer satisfaction in mind
Technical contribution towards identified tasks and modules
Technical leadership of a team or a module, managing dependencies
Mentoring/coaching other team members on PSS
Must Have Technical Skills:
Expertise in verification using System Verilog/UVM for block and system level verification
Experienced with verification of controllers for one or more protocols like PCIe, CXL, Ethernet, MIPI CSI/DSI, USB, SPI, I2C, GPIO.
Experience in using Verification IPs (VIPs) for the above protocols.Experienced in verification on emulator (Zebu/Palladium/Veloce) environments.
Good to Have Technical Skills:
Exposure to C programming as used in embedded systems (in bare-metal / RTOS or OS environments)
Understanding of complex I/O protocols like Ethernet, PCIe, USB etc. is a plus.
Exposure to power management of a modern SoC is a plus
Prior experience on PSS is a plus
Experience in directly working with customers
Behavioral/ Non Technical:
Strong analytical and problem-solving skills
Excellent verbal and written communication skills
Self-managed and ability to learn and adapt
Eager to take on new challenging work
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