Memory Ip Design-

Analog Devices Foundation IP group is seeking an experiencedSenior Circuit Design Engineer to develop logic IPs (standard cells and memories) to support analog, digital and mixed-signal SOC designs at various technology nodes.Responsibilities would include, but are not limited to: Support internal and external memory compilers. Memory instance view...

Company DescriptionM31 Technology Corporation is a professional silicon intellectual property (IP) provider. With its headquarters in Hsinchu, Taiwan, M31 has substantial experiences in IP development, IC design, and electronic design automation fields. They specialize in providing high-speed interface IPs, memory compilers, and standard cell library...

Company DescriptionM31 Technology Corporation is a professional silicon intellectual property (IP) provider. With its headquarters in Hsinchu, Taiwan, M31 has substantial experiences in IP development, IC design, and electronic design automation fields. They specialize in providing high-speed interface IPs, memory compilers, and standard cell library...

Company Description M31 Technology Corporation is a professional silicon intellectual property (IP) provider. With its headquarters in Hsinchu, Taiwan, M31 has substantial experiences in IP development, IC design, and electronic design automation fields. They specialize in providing high-speed interface IPs, memory compilers, and standard cell library...

Vision: Establishing a world-class semiconductor and wireless systems company headquartered in India to address the expanding requirements for advanced connectivity, computing, and security for wireless 5G and 6G infrastructure and devices. Our product offerings including Intellectual Property (IP), chip design, semiconductor products, software and systems...

Overview: TekWissen Group is a workforce management provider throughout India and many other countries in the world. The below client represents the connected world, offering innovative and customer-centric information technology experiences Position: Memory Design Location: Bangalore Duration: Full Time Job Description: Involved in design of all...

Job description for HW Leapfrog Semiconductor is a well-funded chip design startup engaged in developing cutting edge solutions for the AI enhanced communications signal processing market (eg:5G, Wifi physical layer, Automotive/radar, etc). We are headquartered at San Diego, California and have a major engineering center at Bangalore, India. Backed by...

Position: Senior Memory Design EngineerLocation: Bangalore / NoidaResponsibilities:As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPARequired Skills and Experience :Understanding of computer architecture and concepts.Basic understanding of CMOS...

Job DescriptionYou will be part of the Corporate Memory Organization Memory Compiler Team and will own significant engineering tasks in a fast-paced and technically challenging environment. Responsibilities of the role include but are not limited to:- Provide design solutions for meeting challenging memory design specs for various product segments- Help...

Job DescriptionYou will be part of the Corporate Memory Organization Memory Compiler Team and will own significant engineering tasks in a fast-paced and technically challenging environment. Responsibilities of the role include but are not limited to:- Provide design solutions for meeting challenging memory design specs for various product segments- Help...

Job DescriptionYou will be part of the Corporate Memory Organization Memory Compiler Team and will own significant engineering tasks in a fast-paced and technically challenging environment. Responsibilities of the role include but are not limited to:- Provide design solutions for meeting challenging memory design specs for various product segments- Help...

Experienced: _4+ years_ CTC Offered: _Based on Competency_ Notice Period: _Max 30days_IO Design-Memory

Responsibilities: Responsible for designing and delivering custom circuits from scratch. Drive design and development of SRAM, register file, custom cells to enable high performance and low power designsWork with microarchitecture team to gather specifications Drive optimal implementation Conduct early sizing estimates and PPA analysis. Perform design entry...

Position: Memory Compiler Layout DeveloperCompany: Innovative TechnologiesLocation: BangaloreExperience: 3+ yearsJoin a dynamic team as a Memory Compiler Layout Developer with responsibilities such as: Designing and developing Memory blocks including Array, Row/Column decoder, sense amplifier, pre-charge, and Control blocks for SRAM. Performing layout...

Job Location: BangaloreNotice Period: Immediate or 15 daysExp:3+ yearsResponsible for Memory Compiler layout development and verification.· Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· Perform layout verification like LVS/ DRC/ Latchup, quality...

SENIOR LOGIC DESIGN ENGINEER – Memory Management UnitFortune 100 OrganizationLocation: BangaloreAs a Hardware Developer, you'll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable our customers to make better decisions quicker on the most trusted hardware platform in...

6 to 15 years of work experience in VLSI RTL IP or Subsystem design. Based on prior skill and desire to learn, the new hire will contribute in either SoC Clock, SoC Power IP/Subsystem, BUS/Subsystem, Peripherial/CPU/GPU Subsystem or other Mobile SoC Subsystem.In depth understand of Digital design principles. AMBA SoC BUS protocols specifically APB, AXI and...

6 to 15 years of work experience in VLSI RTL IP or Subsystem design. Based on prior skill and desire to learn, the new hire will contribute in either SoC Clock, SoC Power IP/Subsystem, BUS/Subsystem, Peripherial/CPU/GPU Subsystem or other Mobile SoC Subsystem. 1. In depth understand of Digital design principles. AMBA SoC BUS protocols specifically APB, AXI...

Director - HBM Memory Circuit Design VerificationTop10 Semiconductor Organization in the worldLocation: HyderabadAs a Director/Senior Manager - HBM Memory Circuit Design Verification, you will work in a highly innovative, motivated, young, and dynamic design team capable of verifying complete products using state of the art memory technologies. You will need...

6 to 15 years of work experience in VLSI RTL IP or Subsystem design.Based on prior skill and desire to learn, the new hire will contribute in either So C Clock, So C Power IP/Subsystem, BUS/Subsystem, Peripherial/CPU/GPU Subsystem or other Mobile So C Subsystem.1.In depth understand of Digital design principles.AMBA So C BUS protocols specifically APB, AXI...