Mts Systems Design Eng

1 week ago

Bengaluru, Karnataka, India Advanced Micro Devices, Inc Full time

Overview:

WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world.

Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded.

Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

Responsibilities:

High-Speed IO Systems Design Engineer-MTS

About The Position


The AMD Semi-Custom Business High-Speed IO Engineering Team is on the lookout for a dynamic, energetic High-Speed IO System Test Engineer to join our growing team in Bangalore.

As a key contributor to the success of AMD's product portfolio, you will be part of a high-performance AMD team driving the delivery of high quality, industry leading product technology to market.

The High-Speed IO Engineering team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

You will be working with the rest of the Global IO Teams to implement processes and best in class processes in the India Team.


The Person

Key Responsibilities:

  • Defining and executing the overall High-Speed IO IP Electrical test plans and validation strategy for AMD Semi-Custom SOC products including the compliance and logo testing related to the various High-Speed IOs such as MIPI MPHY UFS Gear 5/4/3, PCIe Gen4/3, USB4/USB3 Gen2/Gen1, HDMI, DP, DPoC etc. using hardware & software validation tools, oscilloscopes, BERT & logic analyzers.
  • Working closely with supporting teams in SOC design, High-Speed IO IP development, Board Design, Simulation, firmware and diagnostics ensuring readiness for first silicon arrival, electrical characterization across PVT, submitting the test reports to different stake holders and blessing the IO.
  • Participate and contribute to help in RCA of various High-Speed IO related issues throughout the development life cycle.
  • Participate in enhancing AMD's High-Speed IO validation capabilities, including tool and script development, technical and procedural methodology enhancement, and various internal and crossfunctional technical initiatives.
  • Engaging with the various High-Speed IO suppliers in support of the SOC system development and the validation execution.
  • You will be working with Industry leading companies and individuals in defining new specification for some of the newest technology in the industry.

Preferred Experience:

  • 512 years of IO Electrical and Logo Compliance Expertise in at least one or several of Latest cutting Edge HSIOs such as UFS MIPI MPHY Gear 5/4/3, PCIe Gen6/5/4, USB4/3 etc.
  • Working knowledge of any one or multiple High Speed IO technologies such as USB, HDMI, DP, DPoC, PCIe and others (SVI, I2C, JTAG etc.) that fall into a category we call MiscIO. Having a strong background in SI work with High-Speed IO technologies is a major plus.
  • Solid understanding and vast experience on Test and characterization methodology of DDR or High-Speed IO interfaces which includes electrical compliance specifications such as eye diagram, differential signaling, jitter decomposition and analysis, Receiver-JitterTolerance, transmission line considerations, Embedding/deembedding, Measuring Various Types of channel losses, Sparam measurements and Analysis, Phase Noise and Spectrum analysis, Spur measurements etc. through Latest HSIOs Lab Equipment.
  • Expertise in using High End oscilloscopes, J-BERT, Network analyzers ENA/VNA/TDR, spectrum analyzer, Phase Noise Analyzers, clock recovery, signal/function generators, Protocol, and logic analyzers etc.
  • Team Lead capabilities with proven track record of technical expertise in the development & execution of platform level electrical & functional Compliance/Logo test plans.
  • Should be able to use PCB design tools such as Orcad, Allegro, Mentor Graphics etc.
  • Having working knowledge of any one of SI Simulation tools such as Ansys HFSS, Power-SI, Sigrity, ADS is a major plus.
  • Hands on Experience and strong fundamentals on Sparam Extraction, E2E channel Simulation, use of IBIS/AMI models, Simulation to Post Silicon measurements correlation for HSIOs can be a definite asset.
  • Strong Automation skills especially using Python or any other languages like C/C++, Perl, Ruby, C# is desirable.
  • Extensive experience with debug techniques and methodologies, solid data analysis and logical reasoning skills.
  • Possess excellent interpersonal skills and be a strong individual contributor, should be ready to work with diversified teams globally.
  • Must have excellent written and verbal communication skills for both internal and customer facing interaction.
  • Attention

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