Staff Digital Engineer
2 weeks ago
Job title: ASIC Design Engineer
Experience 06-08 years
Education Qualification: BE / B-Tech / M-Tech
Desired Skills and Qualifications
BS/MS degree in Electrical Engineering with more than 04 years of practical experience
Delivered RTL subsystems and/or top level SoC RTL for multiple projects
Expertise in front end design methodologies for RTL database management, RTL partitioning, third party IP integration, lint, DFT, UPF, and synthesis, timing and power analysis
Some hands-on experience in design verification and/or physical design
Strong understanding of SoC integration challenges at subsystem and full chip level
Good experience in Mixed signal IP integration such as ADC, DAC, PCIe PHY, PMON, PLL etc.
Good experience in Digital IP integration such as PCIe, SDIO, USB, ARM processors ect, with protocol knowledge.
Good experience Top-level clock/reset circuit design
Good experience in Memory selection and generation
Responsibilities
Work with chip architect to understand architecture concept and high level requirements
Convert chip spec to RTL using internal and external IPs
Develop the clock, reset generation logic for the full chip
Plan and deliver RTL for continuous integration testing
Support the verification team to devise appropriate test plans and verification strategy
Run the LINT, CLP checks on RTL for quality and ensure RTL is good quality
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