Silicon Layout Design

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Job Role :The position is for a Lead Test Engineer with experience in post-silicon validation of Ethernet systems and a deep understanding of the IEEE 802.3 and 802.2 Ethernet standard specifications.Expected to participate in defining the system...

We are looking for an Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed digital and analog circuit designs. NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and...

Job Summary Position: Analog Layout- Engineer Experience: 2-4 years relevant experience. Location - Bangalore/Hubli Education: B.Tech/MTech Technical Skillset Required: Musthave experience which includes one or more of Analog/SERDES IPs such asADC/DAC/PLL/DLL/Thermal Sensor/HBM/DDR/LDO/GPIO/USB/LVDS/MIPI/PCIe · Thecandidate should...

Job Summary Title/Position : Analog Layout Engineer Experience: 2-12 years Location: Bangalore , Hubli About us: Tessolve Semiconductors, a venture of Hero Electronix, is a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Tessolve...

Job SummaryTitle/Position:Analog Layout EngineerExperience:2-12 yearsLocation:Bangalore,HubliAbout us:TessolveSemiconductors, a venture of Hero Electronix, is a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions.Tessolveoffers a unique...

Responsibilities Should lead a team of 6 to 8 members and will be responsible for execution of the assigned project/program. Responsible for providing technical guidance to the team and coordinating with project functional groups (Design, PNR, CAD, Foundry etc.) for layout deliverables. Should have strong collaboration with Analog Designers across the...

Job DescriptionDevelops custom layout design of complex digital, custom blocks, standard cell libraries, or memory compilers (e.g., bit cells, SRAMs, Register Files). Performs detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf, cell layout, and compiler assembly coding. Conducts complete layout...

Job DescriptionDevelops custom layout design of complex digital, custom blocks, standard cell libraries, or memory compilers (e.g., bit cells, SRAMs, Register Files). Performs detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf, cell layout, and compiler assembly coding. Conducts complete layout...

49693BR INDIA BangaloreJob Description and RequirementsQualification:Experience Required: 6+ years Education: Btech/Mtech Electronics/Electrical engineering- Skills/Experience: Experience in Analog Mixedsignal layout and verification of highspeed digital and/or DDR IOs, Critical signal inclusion. Advanced understanding of Deep submicron effects and...

Analog Layout Engineer(Looking for Immediate Joiners) Exp- 3+ Location- Bangalore We are seeking a proficient Analog Layout Engineer with expertise in high-speed analog and mixed-signal layout designs for TSMC 3nm, 5nm, and Intel 5nm nodes. The ideal candidate will have a solid understanding of basic circuits, matching constraints, and shielding...

OverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365,...

Job DescriptionSRAM DESIGNTeam: End to end SRAM design for Mediatek's processors (CPU, GPU, AI) - SRAM Design, Layout, Qualification, Release, Silicon validationQualification:Required Experience : 5 – 8 YearsDegree : ME/M.Tech in Electronic EngineeringR&R:Working with the SRAM team responsible for FCI design for xCPU systems from R2G.Collaborate with...

Layout Design Engineer (Analog / RF) About the Client : Our MNC semiconductor client provides high-performance IC products in IoT Radios, Timing and Audio Markets.They are looking for Layout Design Engineer (Analog / RF) to be based at Bangalore with the following : Total 3 to 5 years of experience in Layout design engineering (Analog/RF). Must have...

Company: Qualcomm India Private LimitedJob Area: Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:As a "CPU Silicon Bring up and Validation Engineer" you would be part of the CPU Silicon Bringup Team, within the CPU team:The charter for CPU Silicon Bringup team would be to prepare for and support bring up of every SoC using the...

PCB Designer At onsemi, a world-class leader in image sensors for automotive, industrial, surveillance, and consumer applications, our vision extends beyond human perception. We are currently seeking candidates with approximately 8 years of experience as a PCB Designer to join our rapidly growing design center in Bangalore. As a Layout Designer,...

PCB DesignerAs a Layout Designer, you will play a crucial role in designing and delivering high-quality layouts for test and evaluation boards. Your responsibilities will include footprint creation, board layout, Gerber file generation and interaction with the hardware build manager. Our senior team members will provide guidance and training throughout your...

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office...

Skills/Experience:Experience in Analog Mixed-signal layout and verification of high-speed digital and/or DDR IOs, Critical signal inclusion. Advanced understanding of Deep submicron effects and mitigation, Advanced tool usage, Advanced floorplanning techniques, understand digital flow, Advanced strategies. Solid understanding of CMOS and FinFET layouts and...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Design Engineering Manager Location: Bangalore Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design...

Overview:Responsibilities: Owning and driving layout design of assigned macros with Cadence Virtuoso XL/VXL features. Responsible for scratch layout development and ECO fixes on an aggressive schedule. Expertise in layout verification checks LVS, DRC, Antenna, Density with Calibre is a must. Interact and collaborate with circuit designers, CAD across the...