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FPGA Design Engineer-VHDL
1 week ago
We are looking for FPGA DesignEngineer (VHDL) with 6 to 9 Yrs of Experience for our esteemedclient for Bangalore Location.
Key Skills:FPGA VHDL CDC lintingsynthesis
Note:
Minimum Experienceis 6 Years. Kindly do not apply if you don t meet the minimumexperience.
This is an immediaterequirement. Please apply if you can join within 30 days or closeto 30days.
Requirements
.6 experience in FPGA design using VHDL.
. Strong skills on synthesis CDCand linting.
. Exposure or basicknowledge on system Verilog to align with the verification team fortroubleshooting theissues.
SpecificInstructions for Applicants (Mandatory)1. Resume size shall beless than 300 KB (word documentPreferred)
- Please include PhotoIn the resume
- Please includethe below details in theresume
Lastname
Date ofBirth
FathersName
last 4 Digits of PANNumber
BenefitsYouwill be working with a trusted global product engineering andlifecycle services partner to the world s most recognized companiesin the Aero Engines Aerospace & Defense HiTechTransportation (Auto and Rail) Power and Industrial Oil &Gas and Medical Devices industries. With 12K experts and a globalpresence in 73 locations across 15 countries it believes that it isat the forefront of the convergence of mechanical electronicssoftware and digital engineering innovations to enable solutionsfor a safer cleaner world. A Strong Process based organizationCertified for CMMI L5 and multiple other certifications of theprocess and one of the few organizations which are ranked as bestplace to work.
FPGA, VHDL, CDC , linting, synthesis
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