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Sykatiya Technologies
2 weeks ago
KEY RESPONSIBILITIES :
- BE/MTECH with 5 to 7 years of experience in Emulation/ FPGA Prototyping models Creation from RTL / Netlist.
- Defining and documents RTL changes required for Emulation/FPGA.
- Develops hardware and software collaterals and integrates it with the Emulation model.
- Developing emulation test benches to support necessary DV scenarios is an added advantage.
- Emulation model bring-up and emulation verification experience at SoC level.
- Create test plans, write and debug tests for functional verification and emulation platforms.
- Developing and applies automation aids, flows and scripts in support of emulation ease of use and increase the process efficiency.
- Experience in debugging failures using Verdi, log files and waveform dump is mandatory.
PREFERRED EXPERIENCE:
- Knowledge of x86 and/or ARM SoC Architecture.
- Emulation experience with one or more ZeBu, Palladium, Veloce Emulators and FPGA Prototyping Platforms.
- RTL migration, Partitioning, Synthesis, PnR and timing analysis of SoC RTL on industry standard prototyping and emulation platforms.
- Knowledge of one or more protocols; Ethernet, USB, PCIe, DDR, Low and High speed protocols, AMBA BUS protocols.
- Experience with SoC boot flow, clocking, Reset and platform bring up in Emulators is desired.
- Experience with Power management flows is an added advantage.
- Experience in developing C/C++, Python test content.
- Experience with System Verilog Assertions with industry standard tools a plus
- Experience in developing System Verilog based test content.
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