STA (Drive: 3rd Feb'24)

STA Engineers: Location: Bangalore/Hyderabad/Pune/Noida Responsibilities Ability to work with RTL design team to identify the must changes in RTL to coverage the timing and work with PD teams to analyze the post route timing & support the final timing closure. Drive the sign-off timing convergence for high performance designs. Work closely with block owners...

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Overview: Experienced STA/Timing Engineer with 6-8 Years of hands-on experience on timing sign off/convergence for complex SOCs. Ability to start immediately on timing analysis/sign-off with PD/Methodology teams across...

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a...

At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share...

At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share...

Job Information:IndustryIT Services***ProvinceKarnataka***CityBangalore North***Postal Code560001***CountryIndiaJob title: Java developerYears ofEXP:6+YearsLocation:ChennaiNP:30Days/Immediate6+ years exp in JavaGood exp in Spring boot, Micro services, API, Database, Linux, Agile

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary...

Cadenceis a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary...

Job descriptionSpecific Responsibilities·Investigate, plan, and design and productize novel sub-threshold and near-threshold circuits and other related low power circuit techniques (e.g., adaptive body biasing, adaptive clock distributions, level shifters, customized standard cells, specialized memory structures, PDN modeling etc.).·Validate and refine low...

WALK IN DRIVE - DIGITAL MARKETING INTERNS / TRAINEE:Location Department Work TypeTitle - Marketing Interns / TraineeExperience - 0 Yrs to 1 YrsLocation - BangaloreIndustry - Education, Teaching, Training, EdtechEducation - SEO, SEM, Copy Writers, Graphic Design, Web Designing, BA, B Com, BBM, MBA, PGDM, BE, BTECH.JOB SUMMARY:To obtain employment and...

WALK IN DRIVE - INTERNS/ TRAINEE - TRAINING DELIVERY:Location Department Work TypeTitle - INTERNS/ TRAINEE - TRAINING DELIVERY.Experience - 0 Yrs to 1 YrsLocation - BangaloreIndustry - Education, Teaching, Training, EdtechEducation - BA, BCOM, BSC, BCA, BBM, MBA, PGDM, BE, BTECHJOB SUMMARY:To obtain employment and experiential opportunities in business and...

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary...

Job DescriptionMust know full-chip STA, SDC construction. good in timing analysis. Co-work with team members to drive timing closure.Familiar to DMSA/Tweaker ECO flowExperience: 4+ YearsJob Location: Bangalore

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B) global organization? We...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

We are seeking a n innovative Senior Physical Design & Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and SoCs. This position is a broad opportunity to optimize performance, yield, and reliability through increasingly comprehensive modeling, insightful analysis, and automation. This work will influence the entire...

Thanks for exploring your future career path with KPIT- Reimagining Mobility with us.We are looking for inquisitive, solution driven and smart technocrats for the roles of Sr. Software Developer, Tech Lead, Solution Architect, Subject Matter expert.Upon shortlisted, we shall look forward to meeting you in-person for a Technical Discussion at our SBU6...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.Lead and also hands on end to end ASIC design including RTL implementation and design processes of...

Roles & ResponsibilitiesAs a member of our team, you will work with multi-functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression.You will work with 3rd party IP vendors to integrate Memory BIST, scan, PHY I/O BIST, and other DFT logic into a streaming scan fabric with a sequential scan...

Responsibilities Complete ownership of Static timing analysis at full chip level for high speed mixed signal design Experience doing multi-mode multi-corner (MMMC) timing and power analysis using primetime/Tempus. Experience in DMSA/Tweaker ECO flows for PPA improvements. Experience in manual timing fixes, ECO generation for MCMM mode corners. ...