Sr Layout Engg
1 week ago
Responsibilities:
- Produce high quality layout for complex Analog and Mixed-Signal (AMS) IP blocks
- Work on layouts of block/module level for integrated circuits from schematics. Verify using design rules provided by technology and design engineering
- Work on layout floor planning of schematic block/module level, power routing, latch-up, ESD layout and area optimization using best layout techniques considering mismatch and process variations
- Able to perform DRC, LVS, LVL, LEF generation, ERC, Antenna, Density and EM checks
- Work with team members/design engineers for innovative, optimal solutions
- Use production quality workflow and documentation procedures
Minimum Requirements
BS in Electrical Engineering or related + 6 years of experience, or MS + 4 years of experience preferred with experience in analog/mixed-signal layout design of deep submicron CMOS and BCD technologies
Qualification
- Experience in delivering high quality analog layout IPs
- Good understanding of layout fundamentals and best practices
- Proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports
- Programming knowledge in SKILL, Perl, and/or Python is a bonus
- Experience with CADENCE or MENTOR GRAPHICS layout tools
- Solid understanding of semiconductor manufacturing process and DFM techniques
- Proficient at debugging/fixing LVS/DRC errors
- Must be familiar with Cadence Design Environment (CDE) and Unix OS
- Must have strong communication skills and be a team player
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