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Jr DV Engineer
2 weeks ago
Requirements
- Minimumof a Bachelor s degree in Electronic/Electrical EngineeringComputer Engineering or
equivalent.
- Minimum 3years of experience of related field.
- Stronganalysis debugging skills and creative in problemsolving.
- MotivatedSelfdriven and Independent.
- Wellverse in System Verilog (OVM/UVM) Scripting (Python/Perl/Shell) RTLsimulators
Interactivedebugger RTL model build Testbench development Powerawaresimulation
Coveragebased randomconstraint simulation Formal PropertyVerification
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