Head of ASIC/SoC Design Verification

4 weeks ago

Bengaluru, Karnataka, India Eximietas Design Full time

Location: India- Bengaluru

Experience: 20+ Years | Leadership Role

Industry: Semiconductor / VLSI / SoC Design

About the Role

Eximietas Design is seeking a visionary and highly accomplished leader to lead our ASIC/SoC Design Verification business unit in India. This is a rare opportunity for a proven verification expert with strong business and engineering acumen to shape the strategy, build a high-performance team, and lead the verification of industry-defining silicon products with first-silicon success.

You will play a central role in our silicon development lifecycle, owning the end-to-end verification charter—from methodology to execution, from team leadership to cross-functional collaboration.

Key Responsibilities

  • Lead and own the full ASIC/SoC verification lifecycle—strategy, planning, execution, sign-off.
  • Define and scale robust, reusable, and modular verification methodologies (UVM, SystemVerilog).
  • Drive verification for high-speed and complex protocols: PCIe, Ethernet, CXL, DDR, HBM, MIPI, UFS, I2C/I3C, SPI, QSPI, UART, GPIO, etc.
  • Champion low-power verification with UPF, X-prop simulation, and power-aware testbenches.
  • Oversee Gate-level simulations, assertion-based verification, and functional/toggle/code coverage closure.
  • Mentor and scale a world-class team of verification engineers; instill a culture of quality, ownership, and innovation.
  • Collaborate deeply with RTL, DFT, Firmware, Post-silicon, and Architecture teams to drive issue closure and full functional coverage.
  • Guide integration of third-party Verification IPs (VIPs) and manage EDA vendor relationships (Synopsys, Cadence, etc.).
  • Improve verification efficiency by refining flows across VCS, Xcelium/XSim, simulators, waveform analyzers, and debug environments.
  • Oversee processor-based SoC verification, including firmware-driven validation and bring-up with C/SystemVerilog co-simulation.
  • Promote continuous improvement in automation, scripting infrastructure (Shell, Perl, Python, Makefile), and coverage tracking.

Required Qualifications

  • Bachelor's, Master's, or Ph.D. in Electrical/Computer Engineering or related field.
  • 20+ years of hands-on experience in ASIC/SoC Design Verification with 5+ years in senior leadership roles.
  • Deep expertise in SystemVerilog, UVM, coverage-driven and assertion-based verification.
  • Proven success in delivering complex SoCs from spec to silicon, with first-pass success.
  • Strong domain knowledge in low-power design and power-aware verification methodologies (UPF).
  • Expertise in debug, waveform analysis, and scripting (Shell, Perl, Python).
  • Exceptional leadership, communication, and problem-solving skills.
  • Demonstrated ability to lead cross-functional and globally distributed teams.

What We Offer

  • A chance to lead innovation at the forefront of silicon design and verification.
  • Opportunity to build and mentor a world-class verification team in India.
  • Exposure to cutting-edge SoC architectures, tools, and flows.
  • A culture that champions technical excellence, ownership, and continuous learning.
  • Strategic role in a high-impact, high-growth semiconductor environment.
  • If you are a strategic thinker, technical expert, and a team builder with a passion for delivering excellence in VLSI and verification—we want to hear from you.

Discuss/Apply/Refer @

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