Performance Architecture Engineer

3 weeks ago

Bengaluru, Karnataka, India MIPS Full time

Job Details

We are seeking a Performance Architecture Engineer for Functional Modeling, Performance Modeling, and/or Correlation work. This position requires a candidate with knowledge and interest in functional and performance model development, and correlation between performance models and RTL implementations. The candidate will contribute to the advancement of MIPS high-performance designs through their modeling and correlation work, as part of the MIPS Performance Architecture team.

Responsibilities

  • Maintain and improve RISC-V functional models for DV verification and functional execution of performance models.
  • QEMU modeling, both user and system modes.
  • ESESC modeling.
  • Instruction trace tools maintenance and improvement.
  • Investigating performance discrepancies between performance model and RTL simulation results.

Ideal Candidate Qualifications

  • Background in python, C++, and library development.
  • Strong background in RISC-V ISA, its extensions, and memory management methodologies.
  • Background in Linux and OpenSBI.
  • Written RISC-V compliance tests.
  • Hands-on experience developing and improving workload analysis tools.
  • Hands-on experience setting up and improving automation frameworks.
  • Have worked with tools like QEMU, Spike, or similar functional models.
  • Experience with processor micro-architecture concepts.
  • Written performance models for characterizing performance.
  • Experience deploying workloads running under Linux in QEMU.

Additional Plus

  • Background in DV verification practices
  • Background in hardware constructs like TLBs and caches
  • Experience with RISC-V and/or MIPS CPU architecture
  • Familiarity with the Sparta Modeling Framework, STF tracing tools and libraries, System-C, or similar C++ frameworks

Here's what you can expect from us:

At MIPS, you'll be a member of a fast-growing team of technologists that are creating the industry's highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure – you'll be able to understand and have an impact on the bigger picture. A great deal of autonomy, with support from some of the industry's most experienced CPU engineers. An unlimited growth path – with the right skills, you can decide where you want to expand and grow in your role at MIPS. The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting edge applications with industry leading customers.

At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave

More about us:

MIPS is well-known as a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. More than 30 years after the introduction of the original MIPS RISC architecture, MIPS processors have shipped into billions of consumer and enterprise products.

Today, MIPS is once again leading a RISC revolution as we build on our deep roots to accelerate the RISC-V architecture for high-performance applications. We are focused on delivering our first RISC-V products the MIPS eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing. Because of our RISC heritage, deep engineering expertise, and proven technologies, MIPS can accelerate development and deployment of RISC-V based solutions.

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