Principal IP/RTL Design Engineer for TPU

2 days ago


Hyderabad, Telangana, India Mulya Technologies Full time

Principal IP/RTL Design Engineer for TPU / GPU

Hyderabad / Bangalore

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore

Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market.

Position Overview

Seeking an IP/RTL Design Engineer with 5+ years of experience to design IP/RTL for TPUs, focusing on high-performance matrix multiplication, low-latency interconnects, and power-efficient AI acceleration.

Key Responsibilities

  • Design IP blocks for TPU cores, including systolic arrays, vector units, and memory subsystems.
  • Develop Verilog/SystemVerilog RTL for performance, timing, and area optimization.
  • Implement high-speed interconnects (e.g., AXI, NoC) for TPU / /GPU. data pipelines.
  • Optimize designs for high throughput, low latency, and power efficiency in AI workloads.
  • Integrate LPDDR6, HBM3, DDR5, or chiplet-based memory interfaces.
  • Support synthesis, timing closure, and FPGA prototyping and Design Verification team
  • Document microarchitecture and design specifications.

Required Qualifications

  • Education: BS/MS in Electrical/Computer Engineering.
  • Experience: 10+ years in ASIC/FPGA IP/RTL design, with 3+ years in AI accelerators or GPU / TPU-like architectures.
  • Skills:
  • Proficient in Verilog/SystemVerilog RTL design.
  • Knowledge of GPU/TPU architectures, systolic arrays, or matrix multiplication units.
  • Experience with AXI, NoC, or similar interconnect protocols.
  • Familiarity with LPDDR6, HBM3, DDR5, or high-bandwidth memory interfaces.
  • Proficiency with synthesis and timing tools (e.g., Synopsys Design Compiler).
  • Strong problem-solving and teamwork skills.

Preferred Qualifications

  • Experience with AI/ML workloads or datacenter TPU designs and GPU architectures
  • Knowledge of CXL, PCIe, UALink, or Ultra Ethernet.
  • Familiarity with power optimization for high-performance chips.

What is in it for you?

  • Pure play product work environment
  • Chance to work with a tightly knit group of exceptional engineers who come from the top companies of the Semiconductor world
  • Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market.
  • A meritocracy first work place where each peer is a star
  • A chance to be a part of industry shaping product in entirety (not bits and pieces) from initial stages
  • A chance to work at a startup which already has customers and investor lined up for their product pipeline (We do not have a marketing/sales team, because we do not need them).
  • A chance to learn from industry veterans who have already launched multiple Billion Dollar Semiconductor firms over the last 3 decades.

Contact:

Uday

Mulya Technologies

muday_bhaskar@yahoo.com

"Mining The Knowledge Community"



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