ASIC Verification Engineer

Eviden, part of the Atos Group, with an annual revenue of circa € 5 billion is a global leader in data-driven, trusted and sustainable digital transformation. As a next generation digital business with worldwide leading positions in digital, cloud, data, advanced computing and security, it brings deep expertise for all industries in more than 47 countries....

Prodapt is a global technology company and the largest specialized player in the Connectedness industry. As an AI-first strategic partner, Prodapt provides consulting, business transformation, and managed services to top telecom and tech enterprises. Prodapt’s ASIC Services is a leading provider of So C ASIC/FPGA and Embedded Software services. We offer...

Eviden, part of the Atos Group, with an annual revenue of circa € 5 billion is a global leader in data-driven, trusted and sustainable digital transformation. As a next generation digital business with worldwide leading positions in digital, cloud, data, advanced computing and security, it brings deep expertise for all industries in more than 47 countries....

ASIC Verification Engineer Experience: 4+ Years Responsibilities: - You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. - Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) - Define, architect, code, and...

ASIC Verification Engineer Experience: 4+ Years Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver...

ASIC Verification Engineer Experience: 4+ Years Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver...

ASIC Verification Engineer Experience: 4+ Years Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver...

Role DescriptionThis is a full-time on-site role for an ASIC Design Verification Engineer located in Bengaluru. The engineer will be responsible for formal verification, RTL design, computer architecture, functional verification, and debugging. Day-to-day tasks include verifying ASIC designs, ensuring functional accuracy, debugging any issues, and...

ASIC Verification Engineer Experience: 4+ Years Responsibilities:You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites.Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%)Define, architect, code, and deliver...

ASIC Verification Engineer Experience: 4+ Years Responsibilities:You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites.Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%)Define, architect, code, and deliver...