RTL Design Engineer

Senior Principal Design EngineerWe are seeking an experienced Principal Design Engineer to lead the development of our Interface Controller IP solution. The successful candidate will be responsible for designing and supporting the RTL of our PCIe/CXL/IDE/UALink IP solution.Design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution.Collaborate with...

Job Title:">Opportunities in Digital Design and Verification.We are seeking experienced RTL design engineers and verification engineers to join our organization. The ideal candidates will have a strong background in digital design, with experience in RTL ASIC engineering and verification.Key Responsibilities:Designing and verifying complex digital...

Job OverviewWe are seeking a talented Hardware Engineer to join our research team in creating high-quality RTL design, verification, and debugging challenges that mirror real-world semiconductor development processes.The ideal candidate will have a strong background in RTL design using Verilog/SystemVerilog or VHDL, as well as experience with synthesis,...

Seeking a skilled Physical Design Engineer to implement and signoff block level physical design.Responsibilities:Implement block level physical design from RTL to GDSII or Netlist to GDSII,Perform block level physical signoff,Ensure block level timing signoff and ECO generation,Verify block level power signoff,Our ideal candidate has strong automation...

Lead Design EngineerWe are seeking a seasoned Lead Design Engineer to spearhead our design team in creating innovative and efficient designs. The ideal candidate will have a minimum of 4-12 years of hands-on experience in physical design implementation from RTL to GDSII or netlist to GDSII, as well as block level physical signoff, timing signoff, and ECO...

Job Description:As a seasoned professional, you will be responsible for spearheading the development of complex SOC designs from conception to delivery. This involves interacting closely with customers and internal teams to gather requirements, estimate effort, cost, schedules, and design feasibility.The ideal candidate will possess a deep understanding of...

Are you looking for a challenging opportunity in FPGA Design?We are seeking highly skilled RTL - FPGA Engineers to join our team.The ideal candidate will have:Experience with Vivado flow and FPGA architecture.2-3 years of experience in RTL design and implementation.Familiarity with latest FPGA technologies.As a member of our team, you can expect:A dynamic...

Job OverviewWe are seeking a highly experienced Chip Design Lead to spearhead the implementation of complex mixed-signal SoCs. The successful candidate will be responsible for leading a team of engineers and collaborating with external IP vendors to ensure seamless integration and timely completion of projects.Key Responsibilities:Develop and implement...

Key Responsibilities:Physical Design from RTL/Netlist to GDSIISignoff at block level for Physical, Timing and PowerECO generation and closureScripting & automation using Perl, Tcl, Awk, PythonLeading a team of engineers and acting as client SPOCRequirements:Strong expertise in Physical Design flows and signoff methodologiesExcellent technical and...

Senior EMIR EngineerJob Overview:We seek an experienced Senior EMIR Engineer to spearhead RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, focusing on performance, power, and area (PPA) optimization and signoff closure.Key Responsibilities:Expertise in ASIC EMIR/PD flow and EDA tools such as Redhawk-SC, Redhawk – IR, and EM Analysis...