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Senior Engineer System Performance Modellng
2 weeks ago
Senior Engineer System Performance Modeling
Fortune 100 Organization
Location: Bangalore
As a Hardware Developer at IBM, you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today’s market.
Your Role and Responsibilities
As a HW performance lead you will lead the hardware bringup, Pre-silicon & post-silicon performance validation, Performance monitoring unit validation and work closely with hardware development team to ensure model performance and the hardware performance correlates. You are also responsible to ensure server class systems IBM develops meet its performance objective and targets. You will also be responsible for leading modelling effort of key sub-systems like cache, interconnect, memory controller etc. As a performance lead you will also be working on exploring & implementing innovative ways to improve next generation POWER processor/system performance across cache, memory subsystem, interconnects etc. You will be part of highly experienced and talented team of engineers doing processor/system performance modeling, hardware bringup, Pre-silicon verification & post-silicon validation and microarchitecture development and will work closely with Processor/System design architects.
Required Technical and Professional Expertise
- 15+ of relevant industry experience.
- Must have lead multiple HW projects
- Programming: C++, SystemC, Scripting (Python, Perl), Assembly
- Experience developing hardware models for the server sub-systems like cache, interconnect and memory units
- Experience doing Performance Analysis, Workload Characterization & Performance Optimization
- Experience in performing hardware performance validation and correlation
- Experience in server class system bringup and optimization
- Good understanding of Processor microarchitecture, System architecture, Memory & IO subsystem architecture
- Demonstrate leadership in characterizing benchmarks, workloads and use cases and proposing microarchitectural optimizations
- Understanding architecture and micro-architecture features of POWER processor core and system.
- Good communication & presentation skills and to work with geographically distributed collaborators
- Ability to learn new areas quickly
Preferred Technical And Professional Expertise
- Knowledge of Compilers
- Knowledge of Assembly Programming
Contact:
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
"Mining The Knowledge Community"
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