Senior Physical Design Engineer

1 week ago

Greater Bengaluru Area, India DAC Search Inc Full time

My Client:

Early-stage startup based in Silicon Valley, Austin TX and Bengaluru India and is funded by tier-1 Venture Capital and Corporate investors.


Their Mission:

Fuel the chiplet semiconductor revolution and chiplet economy with the best in class and scalable fabric, cache, coherency IPs and software platforms. Delivering the industry’s first software defined and flexible multi-level cache coherent fabric IPs and Chiplet design and architecture platforms that are needed for the next wave of high-performance computing systems. They have been started by veterans from the industry with a proven track record of developing industry leading products both at top semiconductor companies as well as successful startups.


Physical Design Engineer

(US & INDIA) SANTA CLARA CA, AUSTIN TX, BENGALURU INDIA

ON-SITE/HYBRID

​

We are seeking a seasoned Physical Design Engineer with a strong background in all aspects of Physical Design and Implementation flows. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions


Responsibilities

  • Own RTL to GDS physical implementation flows for synthesis, floor-planning, place and route, clock tree synthesis, timing & power closure, EM/IR, PDV and final PD sign off
  • Own physical design & implementation of high-performance designs from block level to system level components
  • Deep collaboration with Micro-architects to explore performance, power and area trade-offs for high performance and low power designs
  • Physical implementation feasibility studies and design recommendations for best PPA
  • Develop methodologies and recipes for various stages of physical implementation
  • Perform various physical design validation (PDV) flows for Timing, Power, EM/IR, etc. to ensure physical design quality
  • Perform design rule checking (DRC), (LVS) checks, and other physical verification tasks

​

Qualifications and Preferred Skills

  • BS, MS in Electrical Engineering or Computer Engineering or related degree
  • Experience in all aspects of physical design including synthesis, floor planning, place & route, timing & power closure, EM/IR, physical design validation, etc
  • Experience with synthesis, place & route, static timing analysis and PDV tools
  • Experience in implementing clock trees and power grids
  • Experience with scripting for physical design flow automation
  • Experience with Synopsys Design Compiler, Prime Time, ICC, Fusion Compiler etc.
  • Good knowledge of high-performance and low-power microarchitecture and logic design principles
  • Understanding of modern (sub 7nm) sub-micron technology nodes and device physics
  • Basic knowledge of System/SoC Architecture and System Verilog RTL coding
  • Strong communication and collaboration skills


RICH@DACSEARCH.COM

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