Senior Design Verification Engineer

2 days ago

Bengaluru, India ACL Digital Full time

Hiring Senior Verification EngineersEmail: kalavathi.srinivas@acldigital.comLocation: Bangalore (Hybrid — 2 days/week onsite)Notice Period: Less than 30 days onlyExperience - 4 - 20 Years📌 JD 1 — Requirement: Role: Senior Design Verification Engineer (15+ Years Experience) (Designation Based on the Final Discussion will decide with mutual understanding)Qualifications:BE / BTech / MTech in EE / EC / ECERequired Skills:4+ years of hands-on Design Verification experienceStrong expertise in verification of various IPs and SoCsExcellent experience with VerilogStrong experience in SystemVerilog & UVM methodologyGood understanding of SoC verification, C, and related verification flows📌 JD 2 — Requirement: Role: Design Verification Engineer (8+ Years Experience)Qualifications:BE / BTech / MTech in EE / EC / ECERequired Skills:8+ years of Design Verification experienceStrong experience in IP Verification, SystemVerilog, and UVMExcellent knowledge of DV concepts and fundamentalsHands-on experience with VerilogStrong understanding of SoC verification, C, and SV/UVM methodology📌 JD 3 — Requirement: Role: Design Verification Engineer (4+ Years Experience)Qualifications:BE / BTech / MTech in EE / EC / ECERequired Skills:5+ years of Design Verification experienceExperience in IP or SoC DVStrong understanding of DV fundamentalsHands-on experience with VerilogMandatory experience with SystemVerilog & UVM methodology

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