Senior Design Verification Engineer

Found in: Appcast Linkedin IN C2 - 2 weeks ago

Bengaluru, India Cadence Design Systems Full time

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.


Job Summary

Cadence is seeking an experienced design verification engineer who will play a critical role in the development of custom accelerator SoCs, in partnership with Cadence computational simulation teams.


Role: Principal Design Engineer/Lead Design Engineer ( SoC team)

Job Responsibilities: (Design Verification Engineer)

  • The qualified candidate will closely work together with ARCH, RTL and FW/SW team in implementation and optimization of our accelerator solution.
  • The candidate must possess hands-on experience and excellent debugging skills in developing System Verilog/UVM based testbenches.
  • Ability to independently verify complex modules in the context of subsystem/SOC using systemic metric-driven approach must be demonstrated.
  • Past participation in successful IP delivery or SOC tape-out is highly desired.
  • Effective cross-team communication and documentation skill is strongly preferred.
  • Experience in automating verification regression and/or management of revision control is a plus.

Qualifications

  • Minimal qualification requires BS/MS degree ECE or CS with 4 -10 years of experience in Design verification.

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