Staff Engineer, Design Verification Engineering
6 months ago
The Engineering Enablement team is responsible for providing industry leading tools, methodologies, and support to engineering teams to accelerate product development across the company. This position is for an opening in the “Systems Verification and Validation team” within the Engineering Enablement organization in the CTO Office. This team works to define and promote the adoption of verification best practices, including Metric-driven verification, UVM, Formal, FuSA, Security, Portable Stimulus, Emulation and FPGA prototyping technologies. This role is focused on leading and supporting product lines on ADI proprietary and industry standard “Emulation and FPGA Prototyping” flows and deployment of industry-leading, innovative verification tools, practices, and methodologies across business units at ADI.
Job Responsibilities:
Job Requirements:
Bachelors/Master’s degree in Electrical/Electronics/VLSI with 7-10 years of experience Expertise in Simulation Acceleration flow, In-Circuit Emulation flow, HW-SW co-validation using Palladium and Protium are highly preferred Proficiency in integrating Accelerated VIPs/Transactors and developing Synthesizable BFMs are highly preferred Proficient in using JTAG debuggers, UART and Ethernet Speed Bridges Proficient in SV, UVM and automation using Perl/Python or similar language is required Experience in common communication protocols such as AMBA,I2C,SPI,UART is required Proficient in verifying Security flows (BootROM) and Secure IPs (AES, DES) is an added advantage Should be able to communicate technical details very effectively with both customers and peer Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days-
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