Design for Testability
3 days ago
Description:
- Accountable for innovative DFT implementation(Scan, MBIST, LBIST & Boundary Scan) at the RTL and Gate level for a given SOC at Hard macro and chip top level.
- Generate and validate ATPG patterns using simulations.
- Shall Validate the DFT implementation using RTL and Gate level simulation.
- Work with Multi-functional Teams on STA, Synthesis, LEC, CLP, verification & Validation.
- Must have experience with Siemens, Synopsys and/or Cadence Cad tools.
- Shall have experience in coding with Verilog, VHDL, C/C++, TCL, Perl and or Python
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Design For Testability
3 days ago
Bengaluru, Karnataka, India Princo Solutions Full time ₹ 8,00,000 - ₹ 12,00,000 per yearCompany OverviewPrinco Solutions is a prominent staffing and service-based organization, specializing in IT solutions and delivering top talent to meet client demands. We focus on workforce solutions, technology services, and business consulting, supporting businesses to scale effectively and optimize their operations. Our offerings include IT staffing,...
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Design for Testability Engineer, SSG
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Bengaluru, Karnataka, India Amazon Full time ₹ 20,00,000 - ₹ 25,00,000 per yearDESCRIPTIONThe team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and...
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Design for Testability Engineer, SSG
1 week ago
Bengaluru, Karnataka, India Amazon Full time ₹ 20,00,000 - ₹ 25,00,000 per yearThe team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We...
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Web Developer/Designer
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Senior Design Engineer
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Graphic Designer
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Lead Design Engr
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Bengaluru, Karnataka, India NXP Semiconductors Full time ₹ 20,00,000 - ₹ 25,00,000 per yearJob Description Your main duties will be:Will be responsible for Designing and Implementing DFT techniques (Memory BIST/Scan/On-Chip Compression/At-speed Scan/Test-clocking/Boundary Scan/Analog Testing/Pin-muxing/Logic BIST) on complex SOCs to improve testability Test Modes implementation and verification, scan insertion including on-chip compression ...
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Lead Design Engr
3 days ago
Bengaluru, Karnataka, India NXP Semiconductors Full time ₹ 20,00,000 - ₹ 25,00,000 per yearJob Description Your main duties will be:Will be responsible for Designing and Implementing DFT techniques (Memory BIST/Scan /On-Chip Compression/At-speed Scan/Test-clocking/Boundary Scan/Analog Testing/Pin-muxing/Logic BIST) on complex SOCs to improve testability Test Modes implementation and verification, scan insertion including on-chip compression ...