Avionics Embedded Engineer

1 day ago

Bengaluru, Karnataka, India BRIGOSHA TECHNOLOGIES PRIVATE LIMITED Full time ₹ 12,00,000 - ₹ 24,00,000 per year

Description : Avionics Embedded Engineer.

Exp : 2-4 yrs.

Loc : Bengaluru.

Notice : 30 days.

Key skills :

- Embedded C/C++ on MCU/SoC targets with RTOS (VxWorks/RTEMS/FreeRTOS) and bare-metal application design for hard real-time behaviors.

- Strong in defining application entities directly from ICDs; precise parsing, validation, versioning, and change tracking of ICD-driven interfaces.

- Data handling : raw-to-engineering unit conversions, scaling, calibration tables, endianness handling, fixed-point arithmetic, and overflow/precision controls.

- Memory architecture : static-only allocation, linker script awareness, partitioning between read-only/read-write, placement across SRAM/DDR, cache coherency, and alignment.

- Concurrency and performance : multithreading/tasking, priority/timing analysis, IPC (queues, mailboxes, shared memory), DMA setup and tuning, ISR design, and lock-free patterns where applicable.

- Drivers and buses : UART/SPI/I2C/CAN/Ethernet; familiarity with ARINC 429/664 and MIL-STD-1553 is beneficial.

- Quality : MISRA C/C++, static analysis basics, unit testing on target, lab instrumentation (JTAG/GDB, oscilloscope, logic analyzer), and rigorous documentation.

Key responsibilities :

- Derive software components from ICDs and requirements; define tasks, states, buffers, and message schemas; implement deterministic modules in C/C++ for RTOS/bare-metal targets.

- Implement raw-to-engineering conversion pipelines, lookup/calibration, sanity checks, and error budgets; ensure numerical stability and deterministic timing.

- Own memory plans with static allocation only; segment code/data thoughtfully across ROM/RAM, SRAM/DDR; manage cache, MPU/MMU regions, and DMA-safe buffers.

- Develop and optimize peripheral drivers and DMA paths; implement IPC, health monitoring, watchdogs, and robust error handling/fault containment.

- Perform on-target bring-up, profiling, and debugging; validate latency/jitter, throughput, and memory footprints; produce clear design notes, test procedures, and change logs.

- Collaborate with systems and hardware teams to maintain ICD alignment and support bench/SIL/HIL testing; address defects with traceable fixes.

Experience required :

- 2 to 4 years in embedded software development with hands?on real?time programming and on?target debugging in regulated or safety?critical domains (avionics, automotive, medical, rail).

- Hands-on experience reading and implementing against ICDs, setting up DMA/IPC, and crafting static-only memory strategies in production firmware.

Nice to have :

- Exposure to avionics or radar systems, ARINC 429/664 or MIL-STD-1553, timing partitioning (e.g., ARINC 653 style), and basic awareness of DO-178C processes.

NP : 30DAYS.

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