STA Engineer

block-level timing constraints ,functional and DFT modes,STA analysis and closure ,PrimeTime,PT-ECO ,QoR,constraints validation,Front-End Design,DFT teams,Clock Tree Synthesis,Timing ECOs,TCL, Unix shell scripting Contact-

CompanyQualcomm India Private LimitedJob AreaEngineering Group, Engineering Group > Hardware EngineeringGeneral SummaryMinimum Qualifications:Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.ORMaster's degree in Computer Science,...

Company:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:Minimum Qualifications:• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science,...

General Summary:As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits,...

General Summary:As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with...

*Company:*Qualcomm India Private Limited*Job Area:*Engineering Group, Engineering Group > Hardware Engineering*General Summary:*As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware...

Position:EngineerJob Description:Principal Accountabilities * Work with teams on floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, signal integrity, physical verification and DFM. * Collaborate on executing the block level place and route assignments from Netlist...

Company:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware...

Domain :: STA (Static Timing Analysis)Work Experience :: 3 6 yearsLocation :: NoidaTool Expertise :: PrimeTime & PT-ECOTechnical Expertise ::• Block level Timing Constraints enablement & analysis ;• Clocking & Data flow understanding ;• Well versed in reviewing check_timing and Constraints QoR checks + Constraints Validation understanding ;• Able to...

Position:Senior Engineer (Level 1)Job Description:Principal Accountabilities* Responsible for  floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, signal integrity, physical verification and DFM.* Execute block level place and route assignments from Netlist through...