Dft lead engineer
3 weeks ago
The candidate is expected to have clear understanding of MBIST, SCAN, ATPG and Simulation concepts.
Candidate must be hands-on with MBIST insertion, Scan Insertion, ATPG pattern generation and simulations, MBIST simulations using industry standard tools of Cadence/Siemens Tessent/Synopsys.
Candidate must have worked on zero delay as well as SDF Timing Simulations and must have good debugging skills using GUI mode of industry standard simulators like VCS, NCSim or Xcelium.
The candidate should have worked on fault models like stuck-at, Transition Delay Faults(TDF) and should have experience in scan test coverage improvement techniques.
Exp- 6+ years
About Company:
7 Rays Semiconductors Private Ltd. is a provider of end to end custom So C design solutions ranging from So C Architecture, RTL design, Design verification, DFT, Physical Design & Analog design. We are focused on providing services to top semiconductor and system companies to help them with the design of their complex So Cs
. We work closely with our clients, building effective partnerships to deliver high-quality solutions tailored to their needs. With a strong engineering team and a proven track record of successful project executions, we are committed to excellence and innovation in So C Design, Development and deployment of customers’ products
.
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