Design engineer

About the RoleCadence Design Systems, Inc. is seeking a skilled Design Engineer to join our team. As a Design Engineer, you will be responsible for developing and verifying complex digital systems.Key ResponsibilitiesDesign and develop digital systems using System VerilogDevelop and maintain verification plans and testbenchesCollaborate with designers and...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure. · The candidate will have the opportunity to work on many varieties of...

Cadence Design Systems, Inc. is seeking a highly skilled Senior Design Verification Engineer to join our team.Job Summary:We are looking for a talented engineer to support the design verification team for our DNA (Deep Neural Accelerator) product line.Responsibilities:Work closely with designers and micro-architects to understand the design.Develop the...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Location : Pune  Design Engineer II Experience in developing complex test bench in System Verilog using OVM/UVM methodology Experience in coding functional coverage and system verilog assertions. Experience validation of protocols such...

Job Description:At Cadence Design Systems, Inc., we're seeking a talented Senior Physical Design Engineer to join our team. As a key member of our design team, you will be responsible for the physical design and verification of complex IP's and SoC's at 16/10/7 nm.Responsibilities:Design and implement physical design flows for ASICs using Cadence tools such...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position RequirementsM.S. or BTech Electrical/Computer/Electronics Engineering (or similar degree)Experience : 3+ years sound knowledge of DDR4/5, LPDDR4/5 IP. Hands on design/verification experience on DDR protocol Exposure to DDR...

Job DescriptionAt Cadence Design Systems, Inc., we are seeking a highly skilled Senior Physical Design Engineer to join our team.Key Responsibilities:Design and implement complex digital and analog circuits using Cadence tools.Develop and maintain physical design flows, including timing closure and physical verification.Collaborate with cross-functional...

Critical Role in Design ImplementationAs a Senior Physical Design Engineer at Cadence Design Systems, Inc., you will play a critical role in the implementation of cutting-edge semiconductor designs. With expertise in physical design, timing closure, and physical verification, you will lead the development of complex IP's and SoC's at 16/10/7 nm.Hands-on...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure. · The candidate will have the opportunity to work on many varieties of...

Position Description:Exp: 7-12 Yrs· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of challenging...

Position Description:Exp: 7-12 Yrs· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of challenging...

Position Description:Exp: 7-12 Yrs· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of challenging...

Position Description:Exp: 7-12 Yrs· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of challenging...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure. · The candidate will have the opportunity to work on many varieties of...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of...

Job Description:As a Senior Principal Design Engineer at Cadence Design Systems, Inc., you will be responsible for leading the design of complex IP's and SoC's at 16/10/7 nm. Our ideal candidate has a strong background in physical design, timing closure, and physical verification, with hands-on experience in Cadence implementation tools such as Genus,...

Position Description:Exp: 7-12 Yrs· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of challenging...

At Cadence, we're looking for a skilled Senior Design Engineer to support the integration and customization of our DDR IP subsystems.Responsibilities:Support integration and customization of CDNS DDR IP subsystems.Analyze and resolve complex subsystem application or implementation issues.Provide professional guidance to customers on DDR Controller and PHY...