Design analysis engineer
5 days ago
Are you looking for a career at one of the leading semiconductor companies in the world Texas Instruments (TI) is looking for a Digital Design Engineer to join the team of enthusiastic engineers who develops highly complex mixed signal devices for audio applications with industry leading performance. These audio products are truly mixed-signal devices with highly integrated digital circuits such as a DSP core for digital filters and audio signal processing blocks, hardware processing blocks, analog controllers, various serial interfaces (Audio serial interfaces, I2C, SPI) and other digital blocks like clock-generation, registers map, Interrupts etc. This is a great opportunity to be part of an established team that’s continuing to look for growth opportunities, working with worldwide leading customers and developing cutting edge solutions in the areas of consumer electronics, industrial and automotive markets. Position : Digital Design Engineer Basic Qualifications : Bachelor's/Master's Degree in EE/ECE Bachelor’s degree in Electrical/Electronics Engineering. 1-2 years of Digital design experience. What can you expect to learn in this role/Opportunity? To innovate on core technology in design methodologies & influence decisions that have wide business impact across many products & teams. To learn overall product development Process and directly influence the features, differentiation & quality of the product. To develop good communication, interpersonal skills while interacting with worldwide cross functional experts. To learn identifying risks across domains and adapt to support changing priorities. To present analysis and conclusions to internal customers and business leaders in a comprehensive and effective manner. To work closely with cross-domain experts other engineers and interns. Strong digital design fundamentals and basic electrical/electronic engineering concepts. Experience in building RTL micro architectures development. Hands on experience in RTL coding. Experience with Verilog/VHDL/System Verilog language. Good understanding of digital timing analysis. Basic scripting knowledge using shell/python/perl is preferred. Knowledge of audio signal chain, I2C, ASI/TDM, memory architecture and FPGA is preferred. Design and Development of digital logic circuits including signal chain, clocking circuits, fault & interrupt handler, memory management and FPGA. Detailed documentation preparation and knowledge sharing of design architecture and implementation with other domains along with conducting Arch and design Reviews Work with analog and firmware design domains on integration of system level specification. Work closely with other design and systems teams to review/close spec gaps and design bugs, as they arise. Handle Design QCs like lint, CDC, RDC Support physical design team and work closely on timing closure. Support DV and silicon validation team with testplan support, design debugs, root cause analysis and workaround. Conducting design reviews and creating the necessary design and product documentation. Interacting with Test/Silicon Validation/Application Engineering team to ensure successful use of products and support customer applications debug/analysis. Excellent teamwork, adapting to situations and ability to guide, help other team members. Communication of design status, issues, and concerns. Strong time management skills that enable on-time project delivery. Experience in silicon debug along with silicon validation team. Experience in audio signal processing and understanding of audio systems/applications. Preferred Skills/ Experience 1-2 years of relevant experience
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Sr Principal PD Design Engineer
7 days ago
bangalore, India Cadence System Design and Analysis Full timeThis is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...
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Sr Principal PD Design Engineer
6 days ago
bangalore, India Cadence System Design and Analysis Full timeThis is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...
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RTL Release Principal Design Engineer
2 weeks ago
Bangalore, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...
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RTL Release Principal Design Engineer
2 weeks ago
bangalore, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer EngineeringExp- 7-12 Yrs- Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc.- Ability to debug existing Verilog/System verilog test cases with little or no help from the designer.- Functional simulation...
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Engineer - design analysis
4 weeks ago
Bangalore, India ACL Digital Full timeCompany: ACL Digital Company Location: Experience: 5 to 15 Years Employment Type: Full-Time ACL Digital company , is looking for talented and driven EMIR/PDN Engineers to be part of our world-class semiconductor design team in Bangalore . Perform EM/IR and power grid analysis for advanced So Cs across process nodes • Redhawk SC, Voltus, Ansys, Synopsys)...
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Verification Lead Design Engineer
3 days ago
bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 5+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs...
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Verification Lead Design Engineer
2 weeks ago
bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Design analysis engineer
5 days ago
Bangalore, India TDK Electronics Full timeEducation : Bachelors degree in Electrical/Electronics Engineering Experience : 10-15 years Pre-design of EMC and storage chokes and prototypes; measurements and evaluation of properties for specifications (data sheet). Practical exchange with NPI/engineering at the sites for sampling, design finalization and project management. Knowledge support of NPI/PD...
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Lead Design Analysis Engineer
2 weeks ago
Bangalore, India ACL Digital Full time# ;# ;# ;# ; # ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding...
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Sr RTL Principal Design Engineer
2 weeks ago
bangalore district, India Cadence System Design and Analysis Full timeRTL Design Engineer for Interface Controller IP development team. Position is based in Bangalore or Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...