Verification Engineer
21 hours ago
Wipro is seeking a skilled Design Verification Engineer to lead the verification process of complex systems-on-a-chip. The ideal candidate will have experience in System Verilog and UVM, as well as strong knowledge of recent verification methodologies.
Salary Information
The estimated annual salary range for this position is ₹1,200,000 - ₹3,600,000 depending on location and experience.
Job Description
As a Design Verification Engineer at Wipro, you will be responsible for leading the verification process of system-on-a-chip designs using System Verilog and UVM. You will work closely with cross-functional teams to identify and resolve design issues, and ensure that the design meets the required specifications.
Required Skills and Qualifications
- ">• Bachelor's or Master's degree in Electrical Engineering or Computer Science
• 4+ years of experience in pre-silicon RTL Verification / IP Verification / SOC verification
• Strong knowledge of System Verilog and working knowledge of recent verification methodologies (UVM)
• Domain expertise in one or more of the following areas:
- ">· System-on-a-chip verification with multiple CPUs and fixed function units with AXI or NOC interconnects
· Verification of embedded CPUs such as ARM, Tensilica, MIPS CPUs and interconnect subsystem through C/Assembly language tests
· Verification of industry standard serial interfaces such as MIPI, USB, PCIe using industry standard VIP components.
· Ethernet Packet Processors, buffer managers, DMA engines etc....
· PHY layer verification of serial interfaces such as Ethernet, PCIe, USB etc.
Benefits
As a Design Verification Engineer at Wipro, you will have opportunities to work on cutting-edge technologies, collaborate with experienced engineers, and develop your skills in a dynamic and fast-paced environment.
Others
If you are passionate about designing and verifying complex systems, we encourage you to apply for this exciting opportunity to join our team at Wipro.
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