
Senior Staff Engineer
4 days ago
Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications.
This role involves developing complex SoC/chip architectures with multi-core, multi-threaded processor subsystems, AI accelerators, interconnects, memory architecture and multi-level caches, multiple clocks and resets, high-speed interfaces, peripherals.
As a senior staff engineer, you will contribute to, and manage a team for, the development of architecture, microarchitecture, and design of SoCs which include RISC-V, ARM or proprietary processor designs, and high-speed interfaces for off-chip memories, along with the integration of wireless systems, power management, and mixed signal IP.
The chosen candidate would be responsible for leading a project through the entire product development process.
Key Responsibilities- Develop and execute Wireless SoC's from definition, through execution, and into production.
- Coordinate with the product marketing teams to develop the SoC requirements and provide necessary design collateral to support product approval gates.
- Maintain the SoC architecture or technical specification to meet product requirements, with a key goal to maximize IP reuse.
- Develop the design schedule, including milestones and resource requirements, and coordinate with cross functional teams on dependencies.
- Represent the design community to provide succinct weekly status and attend cross functional meetings.
12+ years experience in Industry, Bachelor or Master's degree in Electrical or Computer Engineering, capable of leading complex IP, SOC development projects execution.
Top-down planning and execution of SOC projects, full-chip development cycle, hands-on experience in architecture, micro-architecture, digital design processes, knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI, peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN, etc., processors like RISC-V and ARM processors, design signoff flows including Lint, CDC, Formal Verification, Synthesis, Constraints and STA Timing Closure, DFT including Scan, ATPG, MBIST, low power design methodology, hardware accelerators, Verilog and System Verilog, scripting languages like Perl, Python, Tcl, shell.
Benefits & PerksWe offer equity rewards, employee stock purchase plan, insurance plans with outpatient cover, national pension scheme, flexible work policy, childcare support.
You will join a highly skilled and tight-knit team where every engineer makes a significant impact on the product, we strive for good work/life balance and make our environment welcoming and fun.
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