Distinguished Verification Expert
3 days ago
We are seeking a skilled Senior Design Verification Engineer to join our team at L&T Technology Services.
Job SummaryThis position involves leading the design verification process for VLSI skills, focusing on SV/UVM primarily.
About the Role- We require DV engineers with strong experience in SV/UVM.
- Prior knowledge of PCIE protocol is an added advantage.
The selected candidate will be responsible for developing and maintaining coverage models, performing regression failure triage, and testbench bug fixes.
Key Responsibilities- Develop and implement PCIE Physical & Data Link Layer protocol coverage models.
- Analyze and resolve regression failures and testbench bugs.
- Bring up and debug xprop, 0-delay gatesims, and power sims.
- Contribute to integration qualification of subunit designs/models and VIP in unit DV environments.
L&T Technology Services is a leading player in the semiconductor industry, providing innovative solutions to customers worldwide.
What We OfferOur company offers a competitive salary range of $120,000 - $180,000 per annum, commensurate with experience.
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