Senior ASIC Design Architect
1 day ago
About Mulya Technologies
We are a US based well-funded product-based startup looking for highly talented ASIC/RTL/Logic Design Engineers.
Job Overview
Mulya Technologies is seeking an experienced Principal Interconnect Fabric Microarchitecture & IP Logic Design Engineer to join our team. This is a unique opportunity to work on complex design blocks in Verilog and contribute to the development of high-quality designs.
Responsibilities
- Create micro-architecture and detailed design documents that meet performance, power, and area requirements
- Perform RTL coding for complex design blocks in Verilog
- Conduct function/performance simulation checks and debug
- Understand Lint/CDC/Synthesis checks, power analysis, and LEC check
- Define constraints and track bug reports from beginning to closure
- Work with the team to deliver quality designs and collaborate closely with verification and back-end teams
Qualifications
- B.E/M.Tech degree with 8-12 years of experience in ASIC RTL development
- Solid experience with System Verilog
- Experience with Lint, CDC
What We Offer
This role comes with a competitive estimated salary range of $180,000 - $220,000 per year, commensurate with experience.
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