Lead Mixed-Signal Verification Strategist
2 weeks ago
We are seeking an experienced Mixed-Signal Verification Strategist to join our team at Mirafra Technologies. As a key member of our organization, you will be responsible for leading and managing all aspects of the mixed-signal verification practice.
Company OverviewMirafra Technologies is a leading provider of innovative semiconductor solutions. Our mission is to deliver high-quality products that meet the evolving needs of the industry.
SalaryThe estimated salary for this position is $175,000 per year, depending on experience.
Key Responsibilities- Develop and Execute Strategic Vision: Develop and execute a strategic vision for the Mixed-Signal Verification vertical, aligned with the company's goals and objectives.
- Leadership and Team Management: Lead and inspire a team of analog, digital, and mixed-signal verification engineers, fostering a culture of technical excellence, innovation, and collaboration.
- Trend Identification and Capitalization: Identify and capitalize on emerging mixed-signal verification trends (e.g., real-number modeling, advanced AMS methodologies).
- Client Engagement and Partnership: Establish partnerships with industry-leading clients and maintain domain leadership in mixed-signal verification services.
- Recruitment and Talent Development: Manage recruitment, retention, and professional growth of top mixed-signal verification talent.
- Resource Allocation and Project Management: Ensure the team is adequately resourced and equipped to meet evolving project demands.
- Revenue Growth and Margin Management: Achieve consistent revenue growth in the mixed-signal verification vertical along with ensuring healthy margins.
- Tool and Methodology Standardization: Drive tool and methodology standardization for efficient verification across transistor-level (SPICE), behavioral (Verilog-AMS), and system-level (RNM) abstractions.
- Technical Mentorship: Provide technical mentorship to the verification team, ensuring proficiency in PVT corner analysis, gate-level simulations, and mixed-signal co-simulation tools.
- Staying Ahead of Industry Trends: Stay abreast of industry trends and tools like Cadence Virtuoso AMS Designer, Synopsys CustomSim, and SystemVerilog UVM to continuously evolve the team's technical expertise.
- Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- Experience: 15+ years of experience in the semiconductor industry, with at least 7+ years in mixed-signal verification.
- Track Record and Skills: Proven track record of managing and delivering IP and SoC-level mixed-signal verification projects. Expertise in tools such as SPICE simulators (e.g., Cadence Spectre, Synopsys HSPICE), AMS co-simulation platforms, and digital-first verification tools (e.g., Synopsys VCS, Cadence Xcelium). Deep knowledge of analog-digital interaction testing, PVT corner validation, and real-number modeling (RNM).
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