Leading Physical Design Engineer for Advanced Node Designs

1 day ago


Bengaluru, Karnataka, India Mulya Technologies Full time

Mulya Technologies is a pioneering technology company that specializes in developing high-performance IP cores for cutting-edge semiconductor applications. We are seeking an experienced Principal Place-and-Route Engineer to drive digital backend flows and create innovative designs.

Job Overview

We offer a competitive estimated salary of $180,000 - $220,000 per year, commensurate with experience. As a key member of our team, you will work closely with the RTL design team to understand partition architecture and drive physical aspects early in the design cycle.

This role requires strong knowledge of partition level P&R implementation, including floorplanning, clock & power distribution, timing closure, physical & electrical verification. You should have hands-on experience with Cadence PnR tools, floorplanning, IR drop, and physical verification.

Responsibilities
  • Perform Floor-planning and Placement, CTS, Routing
  • LVS, DRC and Antenna checks and Generation of GDSII and .lib
  • Reliability checks like EM violations check and Signal Integrity issues like crosstalk
  • Perform physical verification, IR drop analysis, and generating SPEF

You will also be responsible for knowledge of full RTL to GDSII flow (Floorplan, CTS, PnR, DRC/LVS, SI, IR Drop) and have good understanding of verilog/VHDL. Exposure to low power techniques and knowledge of tcl and Python scripting is a must.

About Us

Mulya Technologies is a young, fast-growing technology company that values innovation, teamwork, diversity, and excellence. We offer excellent compensation and seek individuals who share our high standards and commitment to excellence.



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