Mixed Signal Verification Engineer for Capgemini Engineering
3 weeks ago
Job Title: Mixed Signal Verification Engineer
Location: Not Specified
Experience Level: 5+ Years
Key Responsibilities
- Develop verification infrastructure for Mixed Signal semiconductor products
- Design analog models and come up with innovative solutions
- Expertise in Cadence Virtuoso, Cadence Spectre, Verilog-AMS/System Verilog, and UVM
- Thorough understanding of AMS simulations, digital RTL, and analog schematics
- Support post-silicon investigations to ensure silicon measurements match pre-silicon verification results
What We Offer
- Opportunity to work on cutting-edge projects
- Collaborative team environment
- Chance to develop skills in verification infrastructure and analog modeling
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