Senior ASIC Verification Architect

5 days ago


Hyderabad, Telangana, India eInfochips (An Arrow Company) Full time

About the Role

We are seeking a highly skilled Senior ASIC Verification Architect to lead our Digital Design Engineering team in Hyderabad/Bangalore/Chennai/Ahmedabad. The successful candidate will have direct and first-hand experience managing 4-10 member engineering teams, servicing clients in Project (ODC) based execution models as well as Staffing (Hyderabad Onsite requirements).

Key Responsibilities:

  • Architecting verification environments for ASIC SoCs and providing verification support from defining verification plans to various customers' products.
  • Leading an IP Verification team and providing technical leadership to the Design Verification team as a whole.
  • Effectively managing team members through coaching and mentoring, providing guidance and career planning to team-members.
  • Maintaining and extending assertion libraries, including support for both simulation and Formal Verification (FV).
  • Developing verification environments, including environment assumptions, assertions, and cover properties in context of the verification plan.

Requirements:

  • Minimum 6 years of experience in System Verilog HVL.
  • Minimum 6 years of experience in OVM/UVM/VMM/Test Harness.
  • Hands-on experience of developing assertions, checkers, coverage, and scenario creation.
  • Must have executed at-least 2 to 3 SoC Verification projects.
  • Experience in developing test and coverage plans, verification environments, and validation plans.
  • Knowledge of at-least one industry standard protocols like Ethernet, PCIe, MIPI, USB or similar is required.
  • Review and audit participation.
  • At-least 1 year of experience in handling teams of 5 to 10 engineers.

Salary Range: ₹ 30 lakhs - ₹ 50 lakhs per annum

This is a work-from-office job, and the incumbent must have the willingness and experience of leading and mentoring junior engineers.



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