Senior Digital IC Design Specialist

18 hours ago


Delhi, Delhi, India UST Full time
Job Title: Senior Digital IC Design Specialist

**Overview:**

UST Global is a leading digital technology solutions company dedicated to transforming businesses through innovation. Our team of experts provides cutting-edge solutions in areas such as digital consulting, automation, product engineering, and cloud computing.

**Key Responsibilities:**

We are seeking an experienced IO Layout Engineer to join our team. The ideal candidate will have hands-on expertise in IO block-level and module-level layout design, as well as experience with FinFET technologies and advanced verification platforms. This role involves designing, developing, and verifying IO blocks with a focus on reliability and manufacturability.

**IO Layout Design Challenges:**

* Perform block-level and full-module IO layout design with attention to detail and layout optimization.* Develop IOs from scratch, including floor planning, power bus design, ESD (Electrostatic Discharge) protection, and PAD cell integration.* Apply strong knowledge of IC fabrication processes, layout design fundamentals, and best practices to mitigate reliability issues.

**Verification and Compliance:**

We utilize Calibre and PVS (Physical Verification System) platforms to perform DRC (Design Rule Check), LVS (Layout Versus Schematic), and other verification processes to ensure design compliance. Our team works together to identify and address any design errors or inconsistencies.

**Requirements and Qualifications:**

To be successful in this role, you should have:* A Bachelor's or Master's degree in Electrical Engineering, Electronics, or a related field.* 5+ years of experience in IO layout design, with a focus on block-level and full-module design.* Proven experience in developing IOs from scratch, including floor planning, power bus design, ESD protection, and PAD cell layout.* Hands-on experience with Calibre and PVS verification platforms.* Solid understanding of IC fabrication processes, layout design fundamentals, and IO reliability issues.* Familiarity with FinFET technologies is highly preferred.

**Compensation and Benefits:**

The estimated annual salary for this position is $140,000-$170,000 based on industry standards and location.

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