Chief DDR Memory Architect
3 days ago
Mulya Technologies, a well-funded US-based product startup founded by respected Silicon Valley veterans, is seeking talented Verification Engineers for the following roles.
Memory Controller - Principal / Senior Staff Verification EngineersWe are looking for experienced professionals with hands-on expertise in System Verilog, UVM/OVM, and Object-Oriented Programming to work on DDR5/LPDDR5X/LPDDR6/HBM4 IP verification.
About Mulya TechnologiesMulya Technologies was established in Santa Clara, California, and Hyderabad/Bangalore (WFH). Our team consists of highly skilled engineers who have designed complex system IPs and integrated them with SOC teams.
Job Requirements- Bachelor's or Master's degree in Electrical/Computer Engineering with 10+ years of experience or ME/MTech in Electrical/Computer Engineering with 8+ years of experience.
- Proven track record in DDR5/LPDDR5X/LPDDR6/HBM4 IP verification from environment and tests development to validation closure.
- Proficiency in bus protocols AXI/AHB and scripting languages like Perl, Python, etc.
- Strong communication, collaboration, and interpersonal skills.
- Strong analytical and problem-solving skills.
- Experience in Memory controller, DDR4/5, LPDDR4/5, HBM memory protocols.
- Knowledge of Fabric/Network on chips, Cache Coherency.
- Experience in GLS is an added advantage.
The estimated salary for this role is around $120,000-$180,000 per year, based on industry standards and location. If you're passionate about working on complex system IPs and integrating them with SOC teams, please apply.
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