Verification Engineering Lead

1 week ago


Bengaluru, Karnataka, India Texas Instruments Full time

Job Summary

We are seeking an experienced Verification Engineer to lead our design verification efforts. This is a fantastic opportunity to join the best custom semiconductor team in the world.

**Key Responsibilities:**

  • Develop and execute verification strategies, create test plans, and build test benches for Chip Top.
  • Design and develop DV environments based on system requirements.
  • Setup and manage GLS configurations.
  • Conduct Chip Top Level DV signoff using Formal Verification.

Alternatively:

  • Drive Top Level DV signoff using SV & UVM:
    • Develop UVM components like agents, drivers, monitors, and scoreboards.
    • Maintain functional coverage goals and achieve 100% code coverage (Block, expression, FSM) in IP DV.
    • Familiarity with Vmanager and vplan tools is a plus.
    • Able to automate tasks using Perl or Python.
    • Post-silicon Activities:
      • Generate functional patterns for ATE.
      • Collaborate with Product Engineering to characterize IO timing on Silicon by providing AC characterization TDLs.
      • Work with Application Engineering to ensure successful product use in the marketplace and support customer applications debug/analysis.

**Qualifications:**

  • Excellent debugging and problem-solving skills.
  • Effective communication skills to interact with stakeholders.
  • In-depth knowledge of standard protocols (e.g., I2C, SPI, UART).
  • Strong team and people skills to work closely with architecture and product apps teams.
  • Experience in AMS is an added advantage.

**Preferred Skills/Experience:**

  • 4-10 years of experience in IP DV, SoC DV, and post-silicon debug.
  • Familiarity with Cadence simulation tools.

**Estimated Salary:** $120,000 - $180,000 per year, depending on location and experience.



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