Senior Digital Architect for Advanced SoC Designs

1 week ago


Hyderabad, Telangana, India Silicon Labs Full time

About Silicon Labs:

We are a leader in secure, intelligent wireless technology for a more connected world.

Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications.

We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives.

Job Overview:

The position involves the design of complex system-on-chip (SoC) architectures with multi-core, multi-threaded processor subsystems, security accelerators, interconnects, memory architecture and data & instruction caches, multiple clocks and resets, high-speed interfaces, peripherals.

A successful candidate would contribute to the development of SoC architecture, microarchitecture and design, including ARM Cortex M33 processor and proprietary processor designs, AMBA AHB, AXI, APB along with peripheral interfaces like SDIO, UART, I2S, I2C, PWM and high-speed interfaces for off-chip memories.

The chosen candidate would be responsible for the entire design flow and sign-off, including design, synthesis, and static timing analysis (STA), and be able to deliver reusable and robust IP.

Key Responsibilities:

  • Lead complex IP and SoC development projects execution
  • Top-down planning and execution of SoC projects
  • Full-chip development cycle expertise
  • Building strong technical teams
  • Hands-on experience in architecture, micro-architecture, digital design processes
  • Knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI
  • Peripheral interface knowledge like SDIO, UART, I2S, I2C, PWM, CAN, etc.
  • Processor knowledge like RISC-V and ARM processors
  • Design signoff flows including lint, CDC, formal verification, synthesis, constraints and STA timing closure
  • Low power design methodology knowledge (static/dynamic clock gating, power gating, dynamic voltage and frequency scaling)
  • Hardware accelerator knowledge
  • Verilog and System Verilog knowledge
  • Analytical debugging skills
  • SoC, Memory and Cache Architecture knowledge

Requirements:

  • B.Tech/M.Tech / MS/ Ph.D in Electrical Engineering or Computer Science
  • 10+ years of experience in SoC architecture and design

Preferred Qualifications:

  • Wireless technologies like WLAN, Bluetooth, ZigBee knowledge
  • DFT including scan, MBIST knowledge
  • Mentoring skills
  • Exceptional problem-solving skills
  • Good written and oral communication skills
  • Scripting languages like Perl, Python, Tcl, shell knowledge

Salary Estimate:

$120,000 - $180,000 per annum, depending on location and experience

Benefits:

Equity rewards, insurance plans, paid time off, hybrid working environment, equal opportunities employer



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