Senior RTL Design Engineer
1 week ago
About the Role:
We are seeking a highly skilled Emulation Engineer to work with our team in Bangalore. The ideal candidate will have a strong background in RTL design, debugging, and emulation flows. If you are passionate about hardware verification and thrive in a dynamic environment, this role is suitable for you.
Key Responsibilities :
- Develop, implement, and optimize RTL designs using Verilog, VHDL, and System Verilog.
- Design and maintain test benches for hardware verification, ensuring thorough coverage and accuracy.
- Perform front-end and back-end compilation for emulation processes, focusing on efficiency and accuracy.
- Debug RTL on Emulation/Simulation platforms using triggers and SVA assertions, identifying and resolving complex issues.
- Utilize debugging tools like Verdi for efficient problem-solving and collaborate on Pre-Silicon (Pre-Si) validation and debugging of hardware designs.
- Develop and maintain scripts using Python or TCL to enhance automation and workflow, streamlining processes and improving productivity.
Required Skills :
Proficiency in Verilog, VHDL, and System Verilog RTL coding, with a strong focus on RTL debugging on emulation/simulation environments.
- Strong experience with debugging tools such as Verdi, with a preference for those with hands-on experience.
- Hands-on experience with scripting languages like Python and TCL, with a focus on enhancing automation and workflow.
- Experience in Pre-Silicon validation and debugging, with a strong understanding of hardware verification and emulation methodologies.
- Knowledge of SystemVerilog Assertions (SVA) and trigger-based debugging techniques, with a focus on advancing skills and expertise.
Experience in hardware verification and emulation methodologies, with a strong commitment to delivering high-quality results.
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