Senior DDR PHY Verification Engineer
3 days ago
About the Role
">We are seeking a highly skilled LPDDR5/LPDDR4 expert to lead our validation efforts at Tech Mahindra. As a Senior DDR PHY Verification Engineer, you will be responsible for delivering high-quality test plans and vectors to ensure the successful validation of our designs.
">Key Responsibilities
">- ">
- Develop and execute comprehensive test plans to validate DDR PHY functionality">
- Collaborate with design teams to debug and resolve issues in post-silicon bring-up and HW-SW debug">
- Identify and document regression signatures and bug fixes">
- Ensure quality sign-off and documentation for assigned tasks">
- Stay up-to-date with industry trends and emerging technologies in DDR PHY verification">
Requirements
">To succeed in this role, you will need:
">- ">
- Hands-on experience with DDR PHY architecture, DFI protocol, and Jedec standards for latest Gens">
- Strong understanding of verification concepts, including UVM/OVM and SystemVerilog">
- Experience working with LPDDR5/LPDDR4 and related protocols (AHB, AXI)">
- Excellent debugging, analytical, and problem-solving skills">
- Good communication and teamwork skills">
- A strong attitude towards learning and adapting to new technologies">
What We Offer
">In return for your expertise, we offer a competitive salary package, including:
">- ">
- $120,000 - $150,000 per annum">
- A comprehensive benefits package, including health insurance, retirement plan, and paid time off">
- Opportunities for professional growth and development within a dynamic company">
- A collaborative and inclusive work environment">
How to Apply
">If you are a motivated and experienced engineer looking for a challenging role, please submit your application, including your resume and a cover letter outlining your qualifications and experience.
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