Highly Skilled Verification Engineer for Complex System IP Features

2 weeks ago

Greater Bengaluru Area, India Mulya Technologies Full time
Job Description

We are seeking a highly skilled Verification Engineer to join our team at Mulya Technologies in Santa Clara, California/Hyderabad/Bangalore. This is an exciting opportunity to work on complex system IP features and contribute to the development of cutting-edge technologies.

About the Role

This role involves designing and implementing verification plans, testbenches, and test cases for PCIe/CXL based memory expanders. The successful candidate will have a strong background in System Verilog, UVM, and Object-Oriented Programming, as well as experience in USB/PCIe/CXL IP verification.

Requirements
  • Bachelor's or Master's degree in Electrical or Computer Engineering with 8+ years of experience, or Master's degree in Electrical or Computer Engineering with 6+ years of experience.
  • Hands-on experience in System Verilog, UVM, and Object-Oriented Programming.
  • Proven track record in USB/PCIe/CXL IP verification, including ability to bring up testbenches from scratch and define test plans and sign-off for tape out.
  • Integration and verification of complex System IP features.
  • Experience working closely with RTL designers and SOC teams to scope out integration and verification requirements.
  • Good understanding of memory protocols like DDR, ONFI, NAND, Flash SPI/QSPI.
  • Proficiency in bus protocols AXI/AHB.
  • Proficiency in scripting languages like Perl, Python.
  • Strong communication, collaboration, and interpersonal skills.
  • Strong analytical and problem-solving skills.
Preferred Qualifications
  • Experience in verification of PCIe/CXL based sub-system/SoC/IP.
  • Knowledge of SoC with processor boot-flow.
  • Knowledge of FPGA setup and running FPGA simulations.
  • Experience in GLS is added advantage.
  • Verification expertise in Physical Layer, Link Layer, and Transaction Layer of PCIe/CXL protocols.
  • Experience with compliance at the physical and transaction layers for PCIe/CXL endpoints or root ports.
  • Analysing performance metrics of CXL/PCIE.
  • System-level verification experience for PCIe/CXL.
Estimated Salary Range: $150,000 - $200,000 per annum

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