Senior FPGA Validation Engineer

7 days ago


Hyderabad, Telangana, India UST Full time

At UST, we are seeking a highly skilled FPGA Validation Engineer to join our team in Hyderabad.

We offer a competitive salary of $120,000 per annum, reflecting the demanding requirements of this role.

Job Description:

FPGA Validation engineers with experience in PCIe 4/5, DDR 4/5 or USB3 are ideal candidates for this position.

Key Responsibilities:



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