SystemC Modelling and Simulation Engineer
3 weeks ago
Job Summary: We are seeking a highly skilled Principal SystemC Modelling and Simulation Engineer to join our team at Mulya Technologies. The successful candidate will be responsible for designing and developing SystemC models for various abstractions, including Loosely Timed, Cycle Approximate, and Cycle Accurate.
About the Role:
- Develop System Level Models for Architecture Exploration, Performance Exploration, and SoC Performance Analysis
- Create models for architectural components like Memory Subsystem, Bus Interconnect, and Peripheral Models
- Perform Performance Analysis using SPEC-HPC and SPEC-CPU Benchmarks
- Design and Develop Design Algorithms in C/C++/SystemC for Efficient HW Implementation
Key Qualifications:
- 10+ years' experience in Performance Modelling using SystemC, TLM2.0, and Extending TLM2.0
- Proficiency in C, OOPS, STL, Data Structures, Algorithms, and Programming Concepts
- Exposure to any HDL: SystemC, Verilog, System Verilog
- Understanding of Microprocessor, Microcontrollers, SOC Architecture, Bus Protocols, etc.
- Familiarity with Industry Standard Benchmarks such as SPEC-HPC, LLAMA, and SPEC-CPU, etc.
- Familiarity with Memory Architectures, Memory Controller Architectures, Cache, and MMU
- Knowledge of System Bus (AMBA, OCP, NoC) and Memory Protocols (LPDDR5/LPDDR6/HBM4)
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