Senior Verification Engineer for PCIe/CXL Based Memory Expansion
7 days ago
At Mulya Technologies, a well-funded US-based product startup with design centers in Santa Clara, California, and Hyderabad/Bangalore, we are seeking a highly skilled Senior Verification Engineer to join our team.
The ideal candidate will have 8+ years of experience in electrical/computer engineering or 7+ years of experience in master's degree in the same field. They should be proficient in System Verilog, UVM, and object-oriented programming.
We require hands-on experience in USB/PCIe/CXL IP verification on FPGA and ASIC, with the ability to bring up testbenches from scratch, define test plans, and sign off for tape-out. The successful candidate will also have expertise in integrating and verifying complex system IP features, working closely with RTL designers and SOC teams to scope out integration and verification requirements.
A strong understanding of memory protocols like DDR, ONFI, NAND, Flash SPI/QSPI is necessary, as well as proficiency in bus protocols AXI/AHB. Scripting skills in Perl, Python, etc. are also essential.
The preferred qualifications include experience in verifying PCIe/CXL based subsystems/SOC/IP, knowledge of SoC processor boot-flow, FPGA setup, and running FPGA simulations. GLS experience is an added advantage, along with verification expertise in physical layers, link layers, and transaction layers of PCIe/CXL protocols.
This role requires analyzing performance metrics of CXL/PCIe and having system-level verification experience for PCIe/CXL.
The estimated salary for this position is around $120,000 - $180,000 per year, depending on the candidate's experience and qualifications.
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