Senior Digital Fault Tolerant Engineer for Graphics

14 hours ago


Bengaluru, Karnataka, India Tech Mahindra Full time
Job Overview

We are seeking a highly skilled Senior Digital Fault Tolerant (DFT) Engineer to join our team at Tech Mahindra.

About the Role

This is an exciting opportunity for a seasoned DFT engineer to drive the development of innovative DFT methodologies, architectures, and implementation strategies for graphics cores. The successful candidate will have hands-on experience with complex high-performance cores, ATPG, pattern simulation, and coverage analysis.

Key Responsibilities:
  • Develop and implement DFT methodologies, architectures, and implementation strategies for graphics cores.
  • Collaborate closely with SOC teams to implement DFT required features.
  • Define scan insertion and test mode STA constraints.
  • Work on Safety-compliant DFT for automotive products.
  • Design and implement DFD for High-Performance GPU cores.
Requirements:
  • 5+ years of experience in DFT/ATPG/BIST, with a strong background in Verilog RTL, TCL, and/or Perl coding.
  • Core DFT skills: Scan compression and insertion, Memory BIST, JTAG/IJTAG, At-speed test, ATPG, back-annotated gate-level verification, silicon debug.
  • Experience with Siemens (Mentor), Cadence, and/or Synopsys DFT and simulation tools.
What We Offer:

A competitive salary range of $120,000 - $180,000 per annum, depending on experience.



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