Highly Skilled ASIC Verification Expert Wanted
2 days ago
We are seeking a highly skilled and experienced Senior/Lead ASIC/IP Verification Engineer to join our team at Synopsys Inc in Bangalore and Noida.
About the RoleThis is an exciting opportunity for a senior engineer with expertise in SystemVerilog, Verilog, and Object-Oriented Programming. You will be responsible for developing reusable verification environments using VMM/OVM/UVM methodologies and ensuring validation completeness through regression stability and coverage convergence.
The ideal candidate will have hands-on experience with industry-standard protocols and methodologies, particularly PCIe protocol and its latest specifications like PCIe Gen6. You should also have a good understanding of system design and architecture, as well as experience in driving output from an architecture/methodology perspective.
Responsibilities- Contribute to the development of Verification Intellectual Property (VIP)
- Review and sign off VIP development and updates from a technical perspective, including methodology and protocol functional prospective
- Define Testplans for PCIe specification features, develop sequences and testcases, ensure validation completeness through regression stability and coverage convergence
To be successful in this role, you should have:
- A minimum of 4 years of experience in ASIC/IP verification, preferably with a strong background in SystemVerilog, Verilog, and Object-Oriented Programming
- Hands-on experience with industry-standard protocols and methodologies, particularly PCIe protocol and its latest specifications like PCIe Gen6
- Good understanding of system design and architecture
- Experience in driving output from an architecture/methodology perspective
Synopsys Inc offers a competitive salary range of $150,000 - $200,000 per annum, based on experience, plus additional benefits such as medical insurance, retirement plans, and paid time off.
Please note that salary may vary based on individual qualifications and performance.
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