Lead Chip Level Analog Engineer
4 days ago
Senior Analog Layout EngineerWe are seeking a seasoned Senior Analog Layout Engineer with extensive experience in designing and integrating high-speed analog IPs at the chip level. This position requires deep knowledge of ICC2-based top-level integration, comprehensive IP verification expertise, and the ability to run block-level simulations independently.The ideal candidate will take full ownership of IP development, verification, integration, and delivery, including foundry coordination, signoff, and tape-out.About the Role:We are looking for an expert Senior Analog Layout / IP Delivery Engineer with strong expertise in designing and integrating high-speed analog IPs at the chip level. This role requires deep knowledge of ICC2-based top-level integration, extensive IP verification experience, and the ability to run block-level simulations independently.Key Responsibilities:Analog Layout & Integration: Lead chip-level planning and integration of high-speed analog IPs, execute complete analog layout design, including floor planning, routing, device matching, shielding, EM/IR checks, and parasitic optimization.IP Verification & Signoff: Own the entire IP verification process, ensure zero-violation GDS delivery for IP signoff, work closely with foundry teams on PDK clarifications, rule updates, model issues, PEX discussions, and tape-out requirements.Cross-Functional Collaboration: Coordinate with PD, DV, circuit design, packaging, and integration teams for seamless IP delivery, prepare and deliver comprehensive IP documentation, abstracts, verification reports, and final GDS.Required Skills & Qualifications:8+ years of proven experience in Analog/Mixed-Signal Layout.Deep expertise in high-speed IPs: SERDES, PLL, ADC/DAC, Tx/Rx, clocking blocks.Strong understanding of chip-level hierarchy, integration, and physical interfaces.Proficiency in Cadence Virtuoso, PVS, Calibre, and extraction tools.In-depth knowledge of DRC/LVS/ERC, PEX & RC Extraction, Signoff decks and reliability checks.Benefits:This is a unique opportunity to join our team as a Senior Analog Layout Engineer and contribute to the development of cutting-edge analog IPs. We offer a dynamic work environment, opportunities for growth and professional development, and a competitive compensation package.Others:Mandatory hands-on experience with TSMC 5nm, strong understanding of ICC2 flows for complete SoC/top-level integration, ability to run extracted and post-layout simulations for designed blocks.],
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Staff Digital Mixed Signal
2 days ago
belgaum, India Analog Devices Full timeStaff Digital Mixed Signal (DMS) Design Verification EngineerDigital Business Unit (DBU)Analog Devices is seeking Digital Mixed Signal Design Verification Engineer for a Staff level role, who will be responsible for design verification of highly integrated solutions and products in a multifunctional team. You will be working on driving real revenue growth on...
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High-Speed Analog Layout Specialist
4 days ago
belgaum, India beBeeSenior Full timeWe are seeking a highly experienced Senior Analog Layout Engineer with strong expertise in chip-level handling of high-speed analog IPs. This role demands deep technical expertise in chip-level integration, bump planning, and ESD implementation.The candidate will be responsible for delivering complex high-speed analog and mixed-signal layout blocks with...
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belgaum, India beBeeDigital Full timeJob DescriptionAs a Digital Mixed Signal Design Verification Engineer, you will be responsible for driving real revenue growth on the next generation of Intelligence at the Edge products across multiple products and business units.Required Skills and QualificationsKey qualifications include:B.Tech/M.Tech with 8+ years of industry experience in analog/mixed...
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Full-Chip Timing Specialist
4 days ago
belgaum, India beBeeTiming Full timeChip Timing ExpertWe are seeking a seasoned Chip Timing Expert with expertise in full-chip timing analysis, constraint management, and collaboration.Main Responsibilities:Perform comprehensive static timing analysis (STA) for block-level and full-chip sign-off to ensure accurate results.Develop and implement efficient ECO generation at the top level,...
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Advanced System-on-Chip Architect
2 days ago
belgaum, India beBeedesigner Full timeSenior RTL Design EngineerWe are seeking an experienced Senior RTL Design Engineer to take on the challenge of designing and developing complex System-on-Chip (SoC) architectures using Verilog/System-Verilog.Design high-performance SoC designs with expertise in Logic design/RTL coding, SoC design and integration for complex SoCs, and experience with Multi...
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Senior Physical Design Engineer
4 days ago
belgaum, India beBeeEngineering Full timeSenior Physical Design Engineer - SoCWe are seeking a highly experienced senior physical design engineer to drive top-level physical design activities for complex, high-performance system-on-chip (SoC) designs.Main Responsibilities:Lead the integration of various IP blocks and ensure seamless Physical Verification (PV) sign-offDevelop and maintain automation...
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Physical Design Executive
2 days ago
belgaum, India beBeeDesign Full timeAre you a skilled leader in physical design looking for a challenging role?Our organization is seeking an experienced Full Chip Physical Design Lead to drive top-level physical design activities for complex, high-performance SoCs.The ideal candidate will have hands-on expertise in database integration, physical verification, and leading mid-sized engineering...
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Senior Model Engineer
4 days ago
belgaum, India beBeeEmulation Full timeLead Emulation Specialist OpportunityOverview:The successful candidate will be responsible for leading the development and maintenance of emulation models.Key Requirements:Strong background in electrical or electronics engineering with a degree at either bachelor's or master's level.At least four years of experience in emulation, preferably with a focus on...
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SoC pre/post silicon validation Engineer
2 weeks ago
Belgaum, India ACL Digital Full timeSoC pre/post silicon validation EngineerExperience : 5+ yearsLocation : ChennaiCandidate should have 5-8 years of related experience in SoC pre/post silicon validation.ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ValidationASIC Validation experience related to board bring up and debug.Perform system level validation and debugDebug...
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SoC pre/post silicon validation Engineer
2 weeks ago
Belgaum, India ACL Digital Full timeSoC pre/post silicon validation EngineerExperience : 5+ yearsLocation : ChennaiCandidate should have 5-8 years of related experience in SoC pre/post silicon validation.ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ValidationASIC Validation experience related to board bring up and debug.Perform system level validation and debugDebug...
